I. Introduction
Modern computers require their CPUs and GPUs to have faster data processing with minimum thermal design power (TDP). As a result, modern processors integrate many transistors and use multiple cores to maximize their speed and minimize the TDP [1], [2]. However, these two features introduce new challenges to the design of the multiphase interleaved buck regulators that power these processors. First, with the increase in transistor count the processor's power and current requirement increases. Second, the multicore technology introduces large step load transients with very high slew rates (up to 1000 A/s). Hence, to meet these requirements, the phase count of multiphase buck regulators has continued to increase to: 1) limit the per phase current, reduce converter losses, and maximize the efficiency; 2) reduce the equivalent inductance and achieve fast transient response with a reduced output capacitor requirement.