I. INTRODUCTION
Traditional SAR ADC typically achieves accuracy in the range of 8-10 bits. When applied in high-precision devices such as sensors and audio equipment, they are often combined with Delta-Sigma ADC-related techniques. This may involve using higher sampling rates and noise shaping techniques to attenuate sampling noise and quantization noise. Noise-Shaping SAR ADC, as a hybrid structure that combines SAR and Delta-Sigma architectures, offer the advantages of low power consumption and high precision, making them a research focus. Delta-Sigma ADC's oversampling technique involves sampling the input signal at a rate greater than twice its frequency. Oversampling effectively reduces quantization noise within the sampling bandwidth and improves the overall SNR. For each doubling of the oversampling rate (OSR), the SNR increases by approximately 3 dB, and the effective number of bits increases by 0.5 bits.[7] However, excessively high oversampling rates can significantly reduce the system's bandwidth. Therefore, in the design process, an appropriate oversampling rate must be selected to achieve a balance between circuit precision and bandwidth. Noise shaping technology involves integrating the residual voltage Vres generated during the comparison process and constructing the required signal transfer function (STF) and noise transfer function (NTF) for the circuit.[4] This technique moves most of the noise to higher frequencies, significantly reducing in-band noise and improving the overall circuit's SNR. In 2012, a team at the University of Michigan successfully developed the first NS SAR ADC by adding a noise shaping module to an 8-bit SAR ADC, ultimately achieving 10 effective bits [3]. This demonstrates the increase in effective bits that noise shaping brings to SAR ADC. In 2017, the University of Texas achieved noise shaping through the use of passive integrators. Concurrently, researches in China on noise-shaping SAR ADCs have yielded promising results in recent years. In 2019, the University of Electronic Science and Technology of China introduced a second-order noise-shaping SAR ADC. They fabricated a 9-bit, 8.4MS/s ADC using a 40nm process, ultimately achieving an SNDR of 78.4 dB. In 2020, Jiaxin Liu from Tsinghua University proposed a noise-shaping SAR ADC employing a 4x passive gain CIFF structure [5]. Under the conditions of a 2MHz sampling frequency and a 25x oversampling rate, this SAR ADC, utilizing a 9-bit DAC capacitor array, achieved an effective number of bits of 14.5 bits, with a Figure of Merit (FOM) of 178.2 dB. Therefore, noise shaping has the potential to elevate SAR ADCs to higher performance levels, making research into noise-shaping SAR ADCs of significant practical significance and value.[1]