Nonvolatile CMOS Memristor, Reconfigurable Array, and Its Application in Power Load Forecasting

The high cost, low yield, and low stability of nanomaterials significantly hinder the application and development of memristors. To promote the application of memristors, researchers proposed a variety of memristor emulators to simulate memristor functions and apply them in various fields. However, these emulators lack nonvolatile characteristics, limiting their scope of application. This article proposes an innovative nonvolatile memristor circuit based on complementary metal–oxide–semiconductor (CMOS) technology, expanding the horizons of memristor emulators. The proposed memristor is fabricated in a reconfigurable array architecture using the standard CMOS process, allowing the connection between memristors to be altered by configuring the on–off state of switches. Compared to nanomaterial memristors, the CMOS nonvolatile memristor circuit proposed in this article offers advantages of low manufacturing cost and easy mass production, which can promote the application of memristors. The application of the reconfigurable array is further studied by constructing an echo state network for short-term load forecasting in the power system.

I. Introduction

With the rise of artificial intelligence era, the ever-increasing amount of calculations challenges the performance of computer hardware. Traditional computers using the von Neumann architecture suffer from the von Neumann bottleneck, which arises from the separation of storage and computation. To overcome this issue, researchers are exploring new computing architectures, and one promising solution is the in-memory computing architecture based on memristors. Memristors possess nonvolatility, nonlinearity, and scalability, which make them suitable for various applications, including neural dynamic systems [1], [2], [3], neuromorphic systems [4], [5], [6], and chaotic oscillation circuits [7], [8], [9]. Accordingly, the memristor array, with the characteristics of computing in memory, has been highly expected by researchers from academia and industry to break through the von Neumann bottleneck.