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Fractal Geometry-Based On-Chip Inductors for High-Frequency Applications: A Review | IEEE Conference Publication | IEEE Xplore

Fractal Geometry-Based On-Chip Inductors for High-Frequency Applications: A Review


Abstract:

On-chip inductors constitute key components in RF and high-frequency circuits, and in recent years, their miniaturization has been an essential area of research. Fractal ...Show More

Abstract:

On-chip inductors constitute key components in RF and high-frequency circuits, and in recent years, their miniaturization has been an essential area of research. Fractal geometries are becoming an effective solution to the limitations of conventional inductor designs as they offer improved performance and increased miniaturization. This review paper presents an overview of the design and performance analysis of on-chip fractal inductors. Various fractal geometries such as as Sierpinski, Koch, Minkowski, and Hilbert curves based on-chip fractal inductors are examined. Performance metrics for on-chip fractal inductors, such as inductance, Q factor, and self-resonance frequency, are reviewed. This review paper presents a detailed analysis of the current state-of-the-art in on-chip fractal inductors, emphasizing their potential to be a key component of contemporary fields.
Date of Conference: 06-08 July 2023
Date Added to IEEE Xplore: 23 November 2023
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ISSN Information:

Conference Location: Delhi, India

I. Introduction

The design of on-chip inductors with high efficiency and compact size has become increasingly significant as electronic devices become miniaturized. Planar spiral inductors are a kind of monolithic on-chip inductor. These on-chip inductors are nothing but metal lines that are turned around to form a spiral. Even though they can be created using multiple metal layers, but they make use of only the top metal layer. They are stacked up with simple metal wires forming a spiral to improve the inductance value. Planar on-chip inductor is a key component in RFICs and occupies half of the chip area. However, the on-chip inductors have the problem of scaling down unlike the remaining components in IC technology which were successfully scaled down. A significant amount of inductor area is required to capture the optimum magnetic field. Planar inductors result in low inductance values. But they offer improved linearity and decreased noise level when compared with on-chip active inductors.

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