Method for Transient Behavior Modeling of a Multiphase Voltage Regulator Module for End-to-End Power Integrity Simulation

Accurate end-to-end power integrity simulations require models that include every component in the power distribution network, including voltage regulator modules (VRMs) and on-die capacitors. However, including VRMs in power integrity simulations has been challenging, because power electronic simulation tools are not compatible with typical power integrity simulation tools, and encrypted VRM models for SPICE tools are typically not sufficiently accurate to capture the non-linear behaviors under various load conditions. Herein, a SPICE-compatible behavior modeling method is proposed, which is applied and validated for a practical multiphase VRM in a mobile platform. The simulation model adequately captures the control loops of the VRM, such as single-voltage and multiple current feedback loops. By combining the parameter-based equations from the voltage and current feedback networks, the model reproduces pulse-width and pulse-frequency modulation-based VRM operations. For validation of the behavior model, the design parameters are determined through a two-step process. Finally, the proposed behavior modeling method is experimentally validated with an evaluation board with various load conditions.

I. Introduction

Accurately modeling power distribution networks (PDN) including VRM is critical for high-performance digital systems including laptops and mobile platforms [1], [2]. As shown in Fig. 1, a hierarchical PDN can be divided into several parts: the voltage regulator module (VRM); printed circuit board (PCB) PDN; package PDN; and on-chip PDN. A transient current drawn from the on-die circuitry will produce an instantaneous voltage drop at the bump. The time domain behavior of such a drop and the subsequent recovery is called voltage droop which is strongly associated with the VRM and PDN design [3], [4]. Therefore, it is essential to include every component in the PDN from VRMs all the way to the on-die capacitors for accurate end-to-end PI simulation. Fig. 1.

Simplified hierarchical PDN including VRM.