Review of FPGA-Based Digital-to-Time Converters

In the past few years, FPGA technology has rapidly improved, and the performance gap between FPGAs and ASICs is getting smaller and smaller. FPGA-based platforms are known for their high performance, low development cost, and pervasiveness. Researchers are enthusiastic about FPGA-based digital-to-time converter (DTC) development. To determine the focus of future research efforts, it is crucial to analyze the evolution of FPGA-based DTC work. This study aims to present and discuss the existing DTC architectures and compare the advantages and disadvantages between them. A literature review of the state-of-the-art FPGA-based DTC is presented, highlighting its features, limitations, and application areas.

I. Introduction

The digital time converter converts digital code into the desired time interval signal and functions similarly to a timing generator. It has a more comprehensive dynamic range than the latter and can generate time intervals between rising edges of pulses at different outputs. It has long been used in automatic test equipment (ATE), atomic frequency standards, high-precision navigation and positioning, electronic measurements, and switching of high-precision devices [1]–[2]. Resolution is an index to evaluate the performance basis of DTC systems. However, the current resolution has reached the picosecond or even sub-picosecond level, and there needs to be more room for improvement. The current research mainly focuses on improving the DTC nonlinear parameters, and the DTC system's integral nonlinearity (INL) and differential nonlinearity (DNL) will directly affect the overall accuracy.