On-Chip Surge Protection Structure with High Surge Robustness for USB PD 3.1 Applications

An on-chip surge protection device for VBUS pins in the USB type-C interfaces is optimized to comply with USB Power Delivery (PD) 3.1 specification. Compared to the traditional PNP BJT, the new proposed PNP BJT with inserted base layout can reach higher surge and ESD robustness with relatively small area. The proposed devices fabricated in a 0.18-μm BCD technology have been measured by surge, HBM, and TLP tests to verify their immunity.

I. Introduction

With reversible plugging property, fast data transmission rate, and high power delivery characteristics [1], USB type-C has become an indispensable device-to-device interface. Benefiting from 24 pins design, USB type-C can support many different modes, which includes power delivery mode. USB charging standard is listed in Table I. Before USB PD specification was published, USB charging standard is defined in USB Battery Charging (BC) specification [2] - [4]. According to the USB PD 3.1 specification, type-C cable now is capable of delivering maximum power of 240W. To reach highest power delivery level, the maximum voltage and driving current of type-C V_BUS pin is up to 48V and 5A, respectively. Because of its hot-plug property and being an system external port, the risk of surge damage is greatly increased for USB type-C, especially for V_BUS pin during such high power delivery. As the result, enhancing surge immunity is a necessary protection design for the USB type-C interface.