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Pre-Litho Back-Side Etch for Improved Flatness and Yield | IEEE Conference Publication | IEEE Xplore

Pre-Litho Back-Side Etch for Improved Flatness and Yield

Publisher: IEEE

Abstract:

It is well known in the semiconductor fabrication industry that pre-lithography backside defects can cause flatness issues. While traditional pre-photo cleans utilize a b...View more

Abstract:

It is well known in the semiconductor fabrication industry that pre-lithography backside defects can cause flatness issues. While traditional pre-photo cleans utilize a brush for backside particle cleaning, certain defects require more aggressive cleaning. This paper evaluated the addition of a backside etching process to reduce backside defects and the resulting impact on wafer flatness and yield.
Date of Conference: 01-04 May 2023
Date Added to IEEE Xplore: 12 May 2023
ISBN Information:

ISSN Information:

Publisher: IEEE
Conference Location: Saratoga Springs, NY, USA

I. INTRODUCTION

As minimum feature sizes continue to shrink with each new technology node, the photolithography exposure tool’s depth of focus decreases making the elimination of lithography hotspots even more critical [1], [3], [4], [5]. Removal of backside film residues increases backside film thickness uniformity prior to photolithography thereby reducing defects caused by incorrect focus [6].

References

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