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56-Gb/s PAM4 × 8-Channel VCSEL-Based Optical Transceiver for Co-Packaged Optics | IEEE Conference Publication | IEEE Xplore

56-Gb/s PAM4 × 8-Channel VCSEL-Based Optical Transceiver for Co-Packaged Optics


Abstract:

We report the design and transmission characteristics of 56-Gb/s PAM4 × 8-channel VCSEL-based optical transceiver for Co-Packaged Optics and 400-Gb/s QSFP-DD AOCs. This o...Show More

Abstract:

We report the design and transmission characteristics of 56-Gb/s PAM4 × 8-channel VCSEL-based optical transceiver for Co-Packaged Optics and 400-Gb/s QSFP-DD AOCs. This optical transceiver employs the world smallest 0.3-mm pitch LGA for the electrical interface. When operating the module by a bit stream of 56-Gb/s PAM4 PRBS-13Q in a loopback link system, we observed that the BER is less than the KP4 FEC threshold and the power budget meets the specification of Open Eye MSA.
Date of Conference: 09-11 November 2022
Date Added to IEEE Xplore: 08 February 2023
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Conference Location: Kyoto, Japan
Citations are not available for this document.

I. Introduction

To increase the bandwidth and save power consumption in data centers and high-performance computing systems, Co-Packaged Optics (CPO) has been expected to realize the next-generation server architecture. Several research institutes have been demonstrating silicon photonics-based transceivers, and they will be attractive for mass production with silicon wafer processes and wafer scale packaging. However, VCSEL-based transceivers are still very attractive in terms of saving power consumption. In fact, the ARPA-E sponsored MOTION project demonstrated a power density of 4 pJ/bit in phase 1 and the project has been targeting a lower power density of 2 pJ/bit in phase 2 [1]. VCSEL-based optical interconnects have been mostly employed for short reach applications of <100-m multi-mode fibers (MMFs) with a modulation speed of≥25 Gb/s per channel. A single-mode high-speed VCSEL is very attractive for the coverage of data center interconnects, which requires a longer distance of ≥2 km. To realize wide bandwidth and low power CPO solutions, the NICT B5G research project (#001) [2], BRIGHTEN, has launched since 2021 where a key component is a 1060-nm single-mode VCSEL-based 25-Gbaud ×16-channel optical transceiver with a very high-density optical interface using multi-core fibers (MCFs). According to the CPO collaboration JDF document [3], a land grid array (LGA) interface using a pitch size of 0.6 mm is specified and the footprint of transceiver is as wide as 20.7 mm ×20.1 mm. To decrease the mechanical size of transceiver and daughter board, it is much preferable to use a high-density electrical interface. Hence, we adopt the world narrowest pitch size of 0.3 mm for the electrical pluggable LGA interface. We also build a testing station for an ultra-compact 25-Gbaud × 16-channel transceiver whose footprint is as small as 15.9 mm × 7.7 mm [4]. In order to characterize the electrical interface and testing station, we firstly fabricated an 850-nm multi-mode VCSEL-based 56-Gb/s P AM4 × 8-channel optical transceiver employing commercially available electronics and photonics devices. The number of channels is 8 at the maximum due to the footprint. This transceiver uses a half of high-speed electrical contacts. Such a very small transceiver is also attractive as an optical engine to be built in a 400-Gb/s QSFP-DD pluggable transceiver [5]. In this paper, we describe the structural design and transmission characteristics of the 56-Gb/s PAM4 × 8-channel optical transceiver.

Cites in Papers - |

Cites in Papers - IEEE (8)

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1.
Wataru Yoshida, Kazuya Nagashima, Kensho Nishizaki, Sho Yoneyama, Hideyuki Nasu, "An Ultra-Compact 106-Gb/s PAM4 × 8-Channel Linear-Drive VCSEL-Based Transceiver for Co-Packaged Optics", 2024 IEEE CPMT Symposium Japan (ICSJ), pp.5-8, 2024.
2.
Kensho Nishizaki, Kazuya Nagashima, Wataru Yoshida, Sho Yoneyama, Hideyuki Nasu, "Over 25-GHz Bandwidth Testing Station Using a 0.3-mm-Pitch LGA Interface for a 50-Gbaud × 16-Channel CPO Transceiver", 2024 IEEE CPMT Symposium Japan (ICSJ), pp.9-12, 2024.
3.
Toshiki Kishi, Munehiko Nagatani, Shigeru Kanazawa, Kota Shikama, Takuro Fujii, Hidetaka Nishi, Tadashi Minotani, Norio Sato, Toru Segawa, Shinji Matsuo, "4 ch × 30-Gbps/ch Optical Transmission Performance of a Low-Power Transmitter Flip-Chip-Bonded 1.3-μM LD Array-on-Si", Journal of Lightwave Technology, vol.42, no.19, pp.6691-6700, 2024.
4.
Kazuya Nagashima, Yuta Ishige, Wataru Yoshida, Hideyuki Nasu, "Bandwidth Expansion of a Testing Station Using a 0.3-mm-Pitch LGA Interface for a 25\text{-Gbaud} \times 16- \text{Channel} CPO Transceiver", 2023 IEEE CPMT Symposium Japan (ICSJ), pp.5-8, 2023.
5.
Wataru Yoshida, Yuta Ishige, Kazuya Nagashima, Hideyuki Nasu, "Jitter Margin Analysis of 56-Gb/s \text{PAM}4\times 8-\text{Channel} VCSEL-Based Optical Transceiver for Co-Packaged Optics", 2023 IEEE CPMT Symposium Japan (ICSJ), pp.9-12, 2023.
6.
Daniel M. Kuchta, "Progress of High-speed VCSELs and VCSEL-based Co-Packaging for Short Reach Communications", 2023 Conference on Lasers and Electro-Optics (CLEO), pp.1-3, 2023.
7.
Daniel M. Kuchta, "Developments of VCSEL-based transceivers for Co-Packaging", 2023 Optical Fiber Communications Conference and Exhibition (OFC), pp.1-3, 2023.
8.
Yuta Ishige, Kazuya Nagashima, Wataru Yoshida, Hideyuki Nasu, "Testing station using a 0.3-mm-pitch LGA interface for a 25-Gbaud x 16-channel CPO transceiver", 2022 IEEE CPMT Symposium Japan (ICSJ), pp.5-8, 2022.

References

References is not available for this document.