I. Introduction
Today, FE memory devices have drawn enormous attention due to the advantages of hafnia FE materials in CMOS compatibility, functionality and scalability. In particular, vertical FE NAND flash [1] and M3D integrated devices [2] have been extensively researched for low-power and high-density NVMs. However, for the fabrication of 3D devices, the TB of hafnia FE layers dramatically increases with the number of subsequent process steps. Specifically, for 3D FE NAND flash devices, the FE layers are exposed to successive TB (750 °C for 30 min) during the polysilicon channel deposition process using LPCVD (Fig. 1(a)). On the other hand, for M3D integration, the FE materials at the bottom layer are subjected to the following TB (650 °C for 20 min) during the fabrication of the upper layers [3] (Fig. 1(b)). In this regard, the fabrication of 3D FE memory devices requires the high thermal stability of hafnia. However, so far, research efforts have mostly been focused on ‘high-performance 3D devices’ and there aren’t enough reports on the thermal stability of hafnia FE materials.