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Yongfeng Feng

Also published under: Y. Feng

Publications

Citations

Publications by Year

20032011

Co-Authors:

Simon AngJ. C. BaldaJack BourneJoseph A. CarrAndres Escobar

Show All Co-Authors (17)

Yongfeng Feng

Also published under: Y. Feng

Affiliation

Bell Engineering Center

University of Arkansas

Fayetteville, AR, USA

Publication Topics

Distribution System,
Fault Current Limiter,
Semiconductor Devices,
Design Process,
Design Software,
Equivalent Circuit,
Graphical User Interface,
Ground Fault,
High Voltage Direct Current,
Hybrid Electric Vehicles,
Insulated Gate Bipolar Transistor,
Junction Temperature

Biography

Yongfeng Feng (S'05–M'07) received the B.S. degree in electrical engineering from South Jiaotong University, Chengdu, China, in 1984; the M.S. degree in electrical engineering from University of Electronic Science and Technology of China, Chengdu, China in 1993; and Ph.D degree in electrical engineering from University of Arkansas, Fayetteville, in 2007.,Since 2007, he joined the University of Arkansas as a Research Associate with the Department of Electrical Engineering, UA. He was promoted as a research assistant professor in 2009. His current research interests are power semiconductor device modeling, behavioral modeling of power systems and circuits, and CAD tool research.(Based on document published on 14 June 2010).

Publications

Citations

Publications by Year

20032011

Co-Authors:

Simon Ang
J. C. Balda
Jack Bourne
Joseph A. Carr
Andres Escobar

Show All Co-Authors (17)

Author's Published Works

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Showing 1-9 of 9 results

Conferences (8)

Journals (1)

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Yongfeng Feng(6)
H. Alan Mantooth(3)
Y. Feng(3)
H. A. Mantooth(3)
Xiangyu Liu(2)
Department of Electrical Engineering, University of Arkansas, Fayetteville, AR, USA(4)
National Center for Reliable Electric Power Transmission, University of Arkansas, Fayetteville, AR, USA(3)
Arkansas Power Electronics International, Inc., Fayetteville, AR, USA(2)
Arkansas Power Electronics International, Fayetteville, AR, USA(1)
National Center for Reliable Electric Power Transmission, NCREPT, Department of Electrical Engineering, University of Arkansas, Fayetteville, AR, USA(1)
2003 IEEE International Symposium on Circuits and Systems (ISCAS)(1)
2005 IEEE International Symposium on Circuits and Systems (ISCAS)(1)
2008 IEEE Energy 2030 Conference(1)
2010 Conference Proceedings IPEC(1)
2010 IEEE 12th Workshop on Control and Modeling for Power Electronics (COMPEL)(1)
IEEE(9)
Atlanta, GA, USA(2)
Bangkok, Thailand(1)
Boulder, CO, USA(1)
Kobe, Japan(1)
New Orleans, LA, USA(1)
Fault Current Limiter(4)
Semiconductor Devices(4)
Behavioral Model(3)
Distribution System(3)
Poles And Zeros(3)

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A methodology to coordinate solid-state fault current limiters with conventional protective devices

Andres Escobar;Mahmood Saadeh;Juan Carlos Balda;Jack Bourne;Yongfeng Feng;H. A. Mantooth

2011 IEEE/PES Power Systems Conference and Exposition

Year: 2011 | Conference Paper |

Cited by: Papers (5)

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High short-circuit currents can cause equipment failures that conventional protective devices may not avoid. Alternatively, solid-state fault current limiters (SSFCL) are designed to limit high levels of short circuit currents, in particular, within quarter cycle. However, the SSFCL may cause sensor and protection equipment malfunction; this may lead to mis-coordination and false tripping between ...Show More

A methodology to coordinate solid-state fault current limiters with conventional protective devices

Andres Escobar;Mahmood Saadeh;Juan Carlos Balda;Jack Bourne;Yongfeng Feng;H. A. Mantooth

2011 IEEE/PES Power Systems Conference and Exposition

Year: 2011 | Conference Paper |

A solid state fault current limiter control algorithm

Yongfeng Feng;M. Saadeh;Andres Escobar;J. C. Balda;Simon Ang;H. A. Mantooth

2010 Conference Proceedings IPEC

Year: 2010 | Conference Paper |

Cited by: Papers (3)

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The fault current limiter (FCL) is considered as the ideal solution to limit the fault current in integrated electrical power systems with distributed energy resources because of its speed of response. However, there are some practical application issues for FCL in commercial industrial deployments. In this paper, the coordination issue of FCL with the other protective devices is discussed making ...Show More

A solid state fault current limiter control algorithm

Yongfeng Feng;M. Saadeh;Andres Escobar;J. C. Balda;Simon Ang;H. A. Mantooth

2010 Conference Proceedings IPEC

Year: 2010 | Conference Paper |

Power-CAD: A novel methodology for design, analysis and optimization of Power Electronic Module layouts

Naveed Hingora;Xiangyu Liu;Yongfeng Feng;Brice McPherson;Alan Mantooth

2010 IEEE Energy Conversion Congress and Exposition

Year: 2010 | Conference Paper |

Cited by: Papers (32)

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Power Electronic Module (PEM) design requires simultaneous analysis of thermal, electrical, and mechanical parameters to design an optimal layout. The current design process being used by package designers involves a sequential procedure instead of a simultaneous process. Each design step involves the analysis of the thermal, electrical or mechanical aspects of the design. As a result, the designe...Show More

Power-CAD: A novel methodology for design, analysis and optimization of Power Electronic Module layouts

Naveed Hingora;Xiangyu Liu;Yongfeng Feng;Brice McPherson;Alan Mantooth

2010 IEEE Energy Conversion Congress and Exposition

Year: 2010 | Conference Paper |

Concerning layout synthesis for power electronic multi-chip modules

Naveed Hingora;Xiangyu Liu;Brice McPherson;Yongfeng Feng;H. Alan Mantooth

2010 IEEE 12th Workshop on Control and Modeling for Power Electronics (COMPEL)

Year: 2010 | Conference Paper |

Cited by: Papers (6)

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Multi-chip power module design requires simultaneous analysis of thermal, electrical, and mechanical parameters to design an optimal layout. The current design process being used by package designers involves a sequential procedure that is time-consuming and requires multiple design runs. The existing Power-CAD methodology that automates the module design process and optimizes the layout has been ...Show More

Concerning layout synthesis for power electronic multi-chip modules

Naveed Hingora;Xiangyu Liu;Brice McPherson;Yongfeng Feng;H. Alan Mantooth

2010 IEEE 12th Workshop on Control and Modeling for Power Electronics (COMPEL)

Year: 2010 | Conference Paper |

Impact of solid-state fault current limiters on protection equipment in transmission and distribution systems

Y. Feng;E. Johnson;O. Saadeh;J. C. Balda;H. A. Mantooth;M. Schupbach

IEEE PES T&D 2010

Year: 2010 | Conference Paper |

Cited by: Papers (9)

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Solid-state fault current limiters (SSFCLs) offer a number of benefits when incorporated within transmission and distribution systems. SSFCLs can limit the magnitude of a fault current seen by a system using different methods, such as inserting a large impedance in the current path or controlling the voltage applied to the fault. However, these two methods can introduce a few problems when SSFCLs ...Show More

Impact of solid-state fault current limiters on protection equipment in transmission and distribution systems

Y. Feng;E. Johnson;O. Saadeh;J. C. Balda;H. A. Mantooth;M. Schupbach

IEEE PES T&D 2010

Year: 2010 | Conference Paper |

Algorithms for Automatic Model Topology Formulation

Yongfeng Feng;H. Alan Mantooth

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year: 2009 | Volume: 28, Issue: 4 | Journal Article |

Cited by: Papers (3)

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A novel algorithm for automatic behavioral model topology formulation (MTF) is described in this paper. Several new terms are defined to support this formulation approach. The algorithms for determining the controllability and equivalence of branches are developed. The identification of differential pairs and current mirror structures is implemented automatically. Some other algorithms identify a ...Show More

Algorithms for Automatic Model Topology Formulation

Yongfeng Feng;H. Alan Mantooth

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year: 2009 | Volume: 28, Issue: 4 | Journal Article |

Fault Current Limiter Placement Strategies and Evaluation in Two Example Systems

Joseph A. Carr;Juan Carlos Balda;Yongfeng Feng;H. Alan Mantooth

2008 IEEE Energy 2030 Conference

Year: 2008 | Conference Paper |

Cited by: Papers (6)

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The growth of demand invariably lead to higher and higher fault currents, and as a consequence protection devices must have higher ratings. The integration of distributed energy resources further complicates protection schemes, especially those that assume a radial distribution scheme and power flowing in only one direction. These conditions generate an increasing demand for fault current limiters...Show More

Fault Current Limiter Placement Strategies and Evaluation in Two Example Systems

Joseph A. Carr;Juan Carlos Balda;Yongfeng Feng;H. Alan Mantooth

2008 IEEE Energy 2030 Conference

Year: 2008 | Conference Paper |

Ascend: automatic bottom-up behavioral modeling tool for analog circuits

W. Zheng;Y. Feng;X. Huang;H.A. Mantooth

2005 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2005 | Conference Paper |

Cited by: Papers (8)

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This paper describes a new fully automated, behavioral modeling tool, Ascend, which starts from the netlist description of the circuit and generates differential algebraic equation (DAE) based behavioral models. The physical modeling methodology in Ascend makes it possible to represent the nonlinear behavior of circuits. A modeling example is given for a better illustration of the behavioral model...Show More

Ascend: automatic bottom-up behavioral modeling tool for analog circuits

W. Zheng;Y. Feng;X. Huang;H.A. Mantooth

2005 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2005 | Conference Paper |

A survey of bottom-up behavioral modeling methods for analog circuits

H.A. Mantooth;L. Ren;X. Huang;Y. Feng;W. Zheng

2003 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2003 | Conference Paper |

Cited by: Papers (8)

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This paper presents a brief on the current state-of-the-art in circuit modeling techniques that abstract reduced-order, higher-level models from the circuit or transistor level. The methods are reviewed in the context of the classes of circuits for which they have been demonstrated.Show More

A survey of bottom-up behavioral modeling methods for analog circuits

H.A. Mantooth;L. Ren;X. Huang;Y. Feng;W. Zheng

2003 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2003 | Volume: 3 | Conference Paper |

Author details

Yongfeng Feng

Yongfeng Feng

Affiliation

Publication Topics

Biography

Showing 1-9 of 9 results

Show

A methodology to coordinate solid-state fault current limiters with conventional protective devices

A methodology to coordinate solid-state fault current limiters with conventional protective devices

A solid state fault current limiter control algorithm

A solid state fault current limiter control algorithm

Power-CAD: A novel methodology for design, analysis and optimization of Power Electronic Module layouts

Power-CAD: A novel methodology for design, analysis and optimization of Power Electronic Module layouts

Concerning layout synthesis for power electronic multi-chip modules

Concerning layout synthesis for power electronic multi-chip modules

Impact of solid-state fault current limiters on protection equipment in transmission and distribution systems

Impact of solid-state fault current limiters on protection equipment in transmission and distribution systems

Algorithms for Automatic Model Topology Formulation

Algorithms for Automatic Model Topology Formulation

Fault Current Limiter Placement Strategies and Evaluation in Two Example Systems

Fault Current Limiter Placement Strategies and Evaluation in Two Example Systems

Ascend: automatic bottom-up behavioral modeling tool for analog circuits

Ascend: automatic bottom-up behavioral modeling tool for analog circuits

A survey of bottom-up behavioral modeling methods for analog circuits

A survey of bottom-up behavioral modeling methods for analog circuits

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