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Tao Su

Publications
38
Citations
137
Publications by Year
20072025
Co-Authors:
Show All Co-Authors (61)
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Tao Su

Affiliation

School of Electronics and Information Technology
Sun Yat-sen University
Guangzhou, Guangdong, China

Publication Topics

Biography

Tao Su (M’10) was born in Yiyang, China, in 1977. He received the B.Sc. degree in physics from the University of Science and Technology of China, Hefei, China, in 2000, the M.Sc. degree in microwave engineering from the Munich University of Technology, Munich, Germany, in 2005, and the Doktor-Ingenieur degree in electronic engineering from the University of Erlangen-Nurnberg, Erlangen, Germany, in 2009.,From 2006 to 2009, he was a Doctoral Student with the Infineon Technologies AG, Munich. He is currently a Lecturer with the School of Physics and Engineering, Sun Yat-sen University, Guangzhou, China. His current research interests include the integrated circuits design.(Based on document published on 20 July 2015).
Publications
38
Citations
137
Publications by Year
20072025
Co-Authors:
Show All Co-Authors (61)
Author's Published Works

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Snippet-inter Difference Attention Network for Weakly-supervised Temporal Action Localization

Wei Zhou;Kang Lin;Weipeng Hu;Chao Xie;Tao Su;Haifeng Hu;Yap-Peng Tan

IEEE Transactions on Multimedia
Year: 2025 | Early Access Article |
The purpose of weakly-supervised temporal action localization (WTAL) task is to simultaneously classify and localize action instances in untrimmed videos with only video-level labels. Previous works fail to extract multi-scale temporal features to identify action instances with different durations, and they do not fully use the temporal cues of action video to learn discriminative features. In add...Show More

Snippet-inter Difference Attention Network for Weakly-supervised Temporal Action Localization

Wei Zhou;Kang Lin;Weipeng Hu;Chao Xie;Tao Su;Haifeng Hu;Yap-Peng Tan

Year: 2025 | Early Access Article |

Single-Ended and Balanced Flat-Group-Delay RF Low-Pass Filters With Input-Quasi-Reflectionless Behavior for Digital-Communication Systems

Zekai Luo;Li Yang;Tao Su;Xi Zhu;Roberto Gómez-García

IEEE Transactions on Microwave Theory and Techniques
Year: 2025 | Volume: 73, Issue: 1 | Journal Article |
Cited by: Papers (4)
A class of RF low-pass filters (LPFs) simultaneously featuring flat-in-band-group-delay and input-quasi-reflectionless characteristics is reported for the first time. By means of a multilayered complementary-diplexer-based topology, a single-ended input-quasi-reflectionless LPF with in-band quasi-flat group-delay response and multiple out-of-band transmission zeros (TZs) is first conceived. It con...Show More

Single-Ended and Balanced Flat-Group-Delay RF Low-Pass Filters With Input-Quasi-Reflectionless Behavior for Digital-Communication Systems

Zekai Luo;Li Yang;Tao Su;Xi Zhu;Roberto Gómez-García

Year: 2025 | Volume: 73, Issue: 1 | Journal Article |

High-Selectivity Bandpass Filter with Controllable Transmission Zeros Designed Using an Over-Moded Groove Gap Waveguide Cavity

Yiming Liu;Tao Su

2024 International Conference on Intelligent Communication, Sensing and Electromagnetics (ICSE)
Year: 2024 | Conference Paper |
In this paper, based on the gap waveguide technology, an X-band high-selectivity and low-loss over-moded filter with out-of-band transmission zero point is proposed. The filter has good electrical performance and manufacturing flexibility, which can reduce manufacturing costs. It consists of two cascade cavities designed using a grooved gap waveguide structure. It consists of two cascaded cavities...Show More

High-Selectivity Bandpass Filter with Controllable Transmission Zeros Designed Using an Over-Moded Groove Gap Waveguide Cavity

Yiming Liu;Tao Su

Year: 2024 | Conference Paper |

Pattern Recognization of Instruction-Level Power Noise with Sythesized Sensor Inside FPGA

Qinming Zhou;Tao Su

2024 9th International Conference on Integrated Circuits and Microsystems (ICICM)
Year: 2024 | Conference Paper |
In a multitenant FPGA, the power noise induced by a victim circuit form a side channel for an attacker on the same FPGA chip to steal the information of the victim. Previous researches are performed on program-level to show how the algorithm type or the key data of a victim can be identified through a synthesized on-chip noise sensor. This paper is focused on the fine-grained waveform of the power...Show More

Pattern Recognization of Instruction-Level Power Noise with Sythesized Sensor Inside FPGA

Qinming Zhou;Tao Su

Year: 2024 | Conference Paper |

A Low-Complexity, Conflict-Free Memory Access Scheme for Flexible NTT /INTT Architecture

Chiayi Kuo;Jingwen Huang;Yuqiao Huang;Tao Su

2024 9th International Conference on Integrated Circuits and Microsystems (ICICM)
Year: 2024 | Conference Paper |
Number Theoretic Transform (NTT) and inverse NTT (INTT) are widely used to accelerate polynomial multi-plications in lattice-based cryptosystems. This paper proposes a low-complexity coefficient memory access pattern for an in-place NTT/INTT design. It simplifies the data path between the processing elements (PEs) and the memory banks. Moreover, to avoid read-after-write conflicts and achieve mini...Show More

A Low-Complexity, Conflict-Free Memory Access Scheme for Flexible NTT /INTT Architecture

Chiayi Kuo;Jingwen Huang;Yuqiao Huang;Tao Su

Year: 2024 | Conference Paper |

Graphene-Based Absorptive Gasket for Chip Packages With Enhanced Radiation-Suppression and Heat-Dissipation Capabilities

Zekai Luo;Tao Su;Kai-Da Xu

IEEE Transactions on Microwave Theory and Techniques
Year: 2024 | Early Access Article |
To overcome electromagnetic interference (EMI) and thermal management issues in chip packages with metal lids or heat sinks, an innovative graphene-based absorptive gasket is proposed in this article. It comprises a dielectric layer and two identical lossy layers that are constituted of printed resistive graphene film with a specific pattern. The proposed gasket can be applied to the bottom of lid...Show More

Graphene-Based Absorptive Gasket for Chip Packages With Enhanced Radiation-Suppression and Heat-Dissipation Capabilities

Zekai Luo;Tao Su;Kai-Da Xu

Year: 2024 | Early Access Article |

Balanced Flat-Group-Delay RF Low-Pass Filter With Differential-Mode Input-Quasi-Reflectionless Behavior for Digital-Communication Systems

Zekai Luo;Li Yang;Tao Su;Roberto Gómez-García

2024 IEEE/MTT-S International Microwave Symposium - IMS 2024
Year: 2024 | Conference Paper |
In this paper, a novel type of balanced low-pass filter (LPF) combining for the first time differential-mode (DM) input-quasi-reflectionless behavior and flat group-delay response is proposed. Using a multilayer complementary-diplexer-based topology, a single-ended input-quasi-reflectionless LPF with flat group-delay characteristics and transmission zeros (TZs) is firstly determined through a comb...Show More

Balanced Flat-Group-Delay RF Low-Pass Filter With Differential-Mode Input-Quasi-Reflectionless Behavior for Digital-Communication Systems

Zekai Luo;Li Yang;Tao Su;Roberto Gómez-García

Year: 2024 | Conference Paper |

SHP-FsNTT: A Scalable and High-Performance NTT Accelerator Based on the Four-step Algorithm

Xiaojie Chen;Weicong Lu;Tao Su;Dihu Chen

2024 IEEE International Symposium on Circuits and Systems (ISCAS)
Year: 2024 | Conference Paper |
Lattice-Based Cryptography (LBC) emerges as a powerful cryptographic primitive, offering a solution for post-quantum security. Within LBC schemes, one of the most computationally intensive tasks is polynomial multiplication, which can be accelerated through the Number Theoretic Transform (NTT). This paper proposes SHP-FsNTT, a scalable, dynamically configurable and high-performance hardware accele...Show More

SHP-FsNTT: A Scalable and High-Performance NTT Accelerator Based on the Four-step Algorithm

Xiaojie Chen;Weicong Lu;Tao Su;Dihu Chen

Year: 2024 | Conference Paper |

An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT

Si-Huang Liu;Chia-Yi Kuo;Yan-Nan Mo;Tao Su

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year: 2024 | Volume: 32, Issue: 3 | Journal Article |
Cited by: Papers (8)
The Number Theoretic Transform (NTT) is a widely adopted method for accelerating polynomial multiplication in lattice-based cryptosystems. Consequently, numerous hardware accelerators have been developed to enhance the speed of the NTT algorithm. Area-Time Product (ATP) and configurability are critical metrics for evaluating these accelerators. ATP measures efficiency, while configurability ensure...Show More

An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT

Si-Huang Liu;Chia-Yi Kuo;Yan-Nan Mo;Tao Su

Year: 2024 | Volume: 32, Issue: 3 | Journal Article |

DATran: Dual Attention Transformer for Multi-Label Image Classification

Wei Zhou;Zhijie Zheng;Tao Su;Haifeng Hu

IEEE Transactions on Circuits and Systems for Video Technology
Year: 2024 | Volume: 34, Issue: 1 | Journal Article |
Cited by: Papers (3)
Multi-label image classification is a fundamental yet challenging task, which aims to predict the labels associated with a given image. Most of previous methods directly exploit the high-level features from the last layer of convolutional neural network for classification. However, these methods cannot obtain global features due to the limited size of convolutional kernels, and they fail to extrac...Show More

DATran: Dual Attention Transformer for Multi-Label Image Classification

Wei Zhou;Zhijie Zheng;Tao Su;Haifeng Hu

Year: 2024 | Volume: 34, Issue: 1 | Journal Article |

Mining Semantic Information With Dual Relation Graph Network for Multi-Label Image Classification

Wei Zhou;Weitao Jiang;Dihu Chen;Haifeng Hu;Tao Su

IEEE Transactions on Multimedia
Year: 2024 | Volume: 26 | Journal Article |
Cited by: Papers (3)
The purpose of multi-label image classification is to assign multiple labels for multiple objects presented in one image. Recent research efforts exploit graph convolution network (GCN) to learn the label co-occurrence dependencies for enhancing the semantic representation. Although these methods have achieved promising results, they can not capture the intrinsic correlation between objects in ima...Show More

Mining Semantic Information With Dual Relation Graph Network for Multi-Label Image Classification

Wei Zhou;Weitao Jiang;Dihu Chen;Haifeng Hu;Tao Su

Year: 2024 | Volume: 26 | Journal Article |

A Case Study on the Internal Mutual Interference of Multitenant FPGA

Jingwen Huang;Qinming Zhou;Chiayi Kuo;Weicong Lu;Tao Su

2023 8th International Conference on Integrated Circuits and Microsystems (ICICM)
Year: 2023 | Conference Paper |
Previous researches have shown that a remote user can cause the circuit of another user in a cloud FPGA to fail by creating mutual interference inside the FPGA. However, the fundamental mechanism of mutual interference is still not clear. This paper conducts a series of tests to investigate the condition and the type of the function failure. Two critical parameters of the interference source, the ...Show More

A Case Study on the Internal Mutual Interference of Multitenant FPGA

Jingwen Huang;Qinming Zhou;Chiayi Kuo;Weicong Lu;Tao Su

Year: 2023 | Conference Paper |

High-Speed Peak Detection Circuit for On-Chip EMI Test

Nuo Lin;Tao Su

2023 IEEE 16th International Conference on Electronic Measurement & Instruments (ICEMI)
Year: 2023 | Conference Paper |
In the electromagnetic interference (EMI) test, the disturbance amplitude is a key parameter to be measured. It is difficult to measure the peak voltage of the disturbance on the integrated circuit (IC) because the chip is encapsulated inside a package. Existing peak detection circuits have relative long response time and thereby cannot detect high-frequency disturbance. To solve that problem, thi...Show More

High-Speed Peak Detection Circuit for On-Chip EMI Test

Nuo Lin;Tao Su

Year: 2023 | Conference Paper |

A $2.81\mu \mathrm{W}$, Energy Efficient MFCC Feature Extractor for Keyword-Spotting in 65nm CMOS

Haohai Yu;Keyan He;Chen Ling;Yang Liu;Dihu Chen;Tao Su

2023 8th International Conference on Computer and Communication Systems (ICCCS)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
Keyword-spotting (KWS) plays a crucial role in human machine interactions involving smart devices. And in most of the KWS systems, Mel Frequency Cepstral Coefficients (MFCC) acts as the feature extractor and consumes an unneglectable amount of computational load and resource. In this paper, to reach a trade-off between accuracy and power consumption, we proposed a modified MFCC algorithm, the comp...Show More

A $2.81\mu \mathrm{W}$, Energy Efficient MFCC Feature Extractor for Keyword-Spotting in 65nm CMOS

Haohai Yu;Keyan He;Chen Ling;Yang Liu;Dihu Chen;Tao Su

Year: 2023 | Conference Paper |

A Single-Layer Low-Profile Dual-Wideband Monopolar Patch Antenna With Shorting Vias and Parasitic Annular Sectors

Zekai Luo;Tao Su;Kai-Da Xu

IEEE Antennas and Wireless Propagation Letters
Year: 2023 | Volume: 22, Issue: 2 | Journal Article |
Cited by: Papers (8)
A new design for dual-wideband microstrip patch antenna is proposed in this letter. A dual-band characteristic is obtained with the help of four loaded shorting vias. To widen both lower and upper impedance bandwidth, parasitic annular sectors are employed to introduce two additional resonant modes. For further demonstration, a prototype is manufactured and tested. The measured results which are c...Show More

A Single-Layer Low-Profile Dual-Wideband Monopolar Patch Antenna With Shorting Vias and Parasitic Annular Sectors

Zekai Luo;Tao Su;Kai-Da Xu

Year: 2023 | Volume: 22, Issue: 2 | Journal Article |

Diverse Feature Learning Network With Attention Suppression and Part Level Background Suppression for Person Re-Identification

Shengrong Yang;Weihong Liu;Yangbin Yu;Haifeng Hu;Dihu Chen;Tao Su

IEEE Transactions on Circuits and Systems for Video Technology
Year: 2023 | Volume: 33, Issue: 1 | Journal Article |
Cited by: Papers (13)
In this paper, we propose a Diverse Feature Learning Network with Attention Suppression and Part Level Background Suppression (DFLN) for person re-identification (ReID). DFLN includes two key components: attention suppression mechanism (ASM) and part level background suppression mechanism (PLBSM). Firstly, despite attention mechanism has made great progress in current state-of-the-art ReID methods...Show More

Diverse Feature Learning Network With Attention Suppression and Part Level Background Suppression for Person Re-Identification

Shengrong Yang;Weihong Liu;Yangbin Yu;Haifeng Hu;Dihu Chen;Tao Su

Year: 2023 | Volume: 33, Issue: 1 | Journal Article |

Rule Check of pad Placement in IC Layout With Yolo V3

Chunxi Lin;Tao Su

2022 China Semiconductor Technology International Conference (CSTIC)
Year: 2022 | Conference Paper |
Deep learning has been widely applied in the image processing. However, few works have been done on the layout check of integrated circuits. This paper tests the capability of Yolo v3 in identifying the rule violation of the IC layout. The test case is the VDD and VSS pad arrangement of a 44-pin die. The result is quite positive. All error spots in the test set have been identified. Even the layou...Show More

Rule Check of pad Placement in IC Layout With Yolo V3

Chunxi Lin;Tao Su

Year: 2022 | Conference Paper |

A Hybrid FDTD-LUT Algorithm and Simulator for Electromagnetic Analyzing in Digital Integrated Circuits

Weifeng Liang;Huimin Liu;Tao Su

2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)
Year: 2021 | Conference Paper |
In this paper, a hybrid simulation algorithm called FDTD-LUT, which bases on the finite difference time-domain (FDTD) algorithm and Look-up table (LUT) method, is proposed for analyzing the electromagnetic field of digital integrated circuits. Moreover, an electromagnetic field simulator Hybrid Electromagnetic Simulator for Integrated Circuit (HESIC) is developed by using this algorithm, which can...Show More

A Hybrid FDTD-LUT Algorithm and Simulator for Electromagnetic Analyzing in Digital Integrated Circuits

Weifeng Liang;Huimin Liu;Tao Su

Year: 2021 | Conference Paper |

A Mobilenet Accelerator with High Processing-Element-Efficiency On FPGA

Jiale Xiao;Yonghao Chen;Tao Su

2021 China Semiconductor Technology International Conference (CSTIC)
Year: 2021 | Conference Paper |
Cited by: Papers (3)
MobileNet is a kind of Convolutional neural networks (CNNs), but the existing MobileNet accelerators on Field Programmable Gate Array (FPGA) show low processing element (PE) efficiency. One of the reasons is that the structure of MobileNet makes the accelerators fall into memory bandwidth bottleneck. For this reason, this work proposed a network mapping strategy to improve the computational effici...Show More

A Mobilenet Accelerator with High Processing-Element-Efficiency On FPGA

Jiale Xiao;Yonghao Chen;Tao Su

Year: 2021 | Conference Paper |

Failure Characteristics of FPGA-Based Convolutional Neural Networks under RF Interference

Xi Lin;Yannan Mo;Tao Su

2021 IEEE 4th International Conference on Electronics Technology (ICET)
Year: 2021 | Conference Paper |
FPGAs have been widely used in multiple parallel computing of convolutional neural networks and realizing the parallel acceleration of multiplication, benefitting from its tremendous scalability and flexibility. So far, most of the researches is based on the design and optimization of FPGA-based convolutional neural network accelerators, which lacks researches on the electromagnetic immunity of co...Show More

Failure Characteristics of FPGA-Based Convolutional Neural Networks under RF Interference

Xi Lin;Yannan Mo;Tao Su

Year: 2021 | Conference Paper |

A CNN/FPGA Co-Exploration Method Based on Hourglass Network

Zhongyu Qiu;Jianli Li;Dongbao Liang;Tao Su

2021 IEEE 4th International Conference on Electronics Technology (ICET)
Year: 2021 | Conference Paper |
Field Programming Gate Array (FPGA) has become a popular choice for neural network inference for its great potential of parallel computing and abundant on-chip buffer resource. Both software and hardware researchers are trying to explore the design space to obtain the best network model and the best accelerator design. Different from the existing sequential exploration method, we propose a CNN/FPG...Show More

A CNN/FPGA Co-Exploration Method Based on Hourglass Network

Zhongyu Qiu;Jianli Li;Dongbao Liang;Tao Su

Year: 2021 | Conference Paper |

Multiscale Omnibearing Attention Networks for Person Re-Identification

Yewen Huang;Sicheng Lian;Haifeng Hu;Dihu Chen;Tao Su

IEEE Transactions on Circuits and Systems for Video Technology
Year: 2021 | Volume: 31, Issue: 5 | Journal Article |
Cited by: Papers (26)
The past few years in the fields of Person Re-Identification (RE-ID) have seen attention mechanism receives enormous interest as it has superior performance in obtaining discriminative feature representations. However, a wide range of state-of-the-art RE-ID attention models only focus on one-dimensional attention design method, e.g. spatial attention and channels attention, hence the produced atte...Show More

Multiscale Omnibearing Attention Networks for Person Re-Identification

Yewen Huang;Sicheng Lian;Haifeng Hu;Dihu Chen;Tao Su

Year: 2021 | Volume: 31, Issue: 5 | Journal Article |

Timing Violation as Dominant Reason for Failure of Clocked Digital Circuit Due to RF Interference in Supply

Shanshan Nong;Tao Su

2020 China Semiconductor Technology International Conference (CSTIC)
Year: 2020 | Conference Paper |
Cited by: Papers (1)
This paper covers our observations of the failure behavior of a clocked digital circuit with sinusoidal interference acting on its supply. Conventionally, it has been thought that interference causes mainly logic-level errors in digital circuits, with the average value of the interference determining the circuit delay. As the interference cycle time is much shorter than both the data path delay an...Show More

Timing Violation as Dominant Reason for Failure of Clocked Digital Circuit Due to RF Interference in Supply

Shanshan Nong;Tao Su

Year: 2020 | Conference Paper |

Three-Dimension Transmissible Attention Network for Person Re-Identification

Yewen Huang;Sicheng Lian;Suian Zhang;Haifeng Hu;Dihu Chen;Tao Su

IEEE Transactions on Circuits and Systems for Video Technology
Year: 2020 | Volume: 30, Issue: 12 | Journal Article |
Cited by: Papers (15)
In this work, we propose a Three-Dimensional Transmissible Attention Network (3DTANet) for Person Re-Identification, which can transmit the attention information from layer to layer and attend to the person image from a three-dimensional perspective. Main contributions of the 3DTANet are: (i) A novel Transmissible Attention (TA) mechanism is introduced, which can transfer attention information bet...Show More

Three-Dimension Transmissible Attention Network for Person Re-Identification

Yewen Huang;Sicheng Lian;Suian Zhang;Haifeng Hu;Dihu Chen;Tao Su

Year: 2020 | Volume: 30, Issue: 12 | Journal Article |

Deeply Associative Two-Stage Representations Learning Based on Labels Interval Extension Loss and Group Loss for Person Re-Identification

Yewen Huang;Yi Huang;Haifeng Hu;Dihu Chen;Tao Su

IEEE Transactions on Circuits and Systems for Video Technology
Year: 2020 | Volume: 30, Issue: 12 | Journal Article |
Cited by: Papers (17)
Person Re-identification (ReID) aims to match people across non-overlapping camera views in a public space, which is usually regarded as an image retrieval problem to match query images with pedestrian images in the gallery. It is challenging since many difficulties exist such as pose misalignments, occlusions, similar appearance when detecting people. Existing researches on ReID mainly focus on t...Show More

Deeply Associative Two-Stage Representations Learning Based on Labels Interval Extension Loss and Group Loss for Person Re-Identification

Yewen Huang;Yi Huang;Haifeng Hu;Dihu Chen;Tao Su

Year: 2020 | Volume: 30, Issue: 12 | Journal Article |

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