T. Scott - IEEE Xplore Author Profile

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Pulsed laser single-event upset tests are used to pinpoint and characterize sensitive nodes of circuits and to provide feedback relevant to the development and optimization of radiation-hard designs. The results presented reveal the advantages of incorporating laser evaluation at an early stage into programs described for the development of radiation-hardened parts. A quantitative correlation is o...Show More
Under the sponsorship of the AFRL AISM program, LMFS teamed with ADI to successfully demonstrate the layout transfer, fabrication and verification of a commercial equivalent Analog Devices Signal Processor (ADSP) 21020 into LMFS's radiation hardened process. This report contains activities related to layout transfer, hardware fabrication, test, and electrical characterization. ADSP-21020 is a wide...Show More
Pulsed laser single-event upset test are used to pinpoint and characterize sensitive nodes of circuits and to provide feedback relevant to the development and optimization of radiation-hard designs. The results presented reveal the advantages of incorporating laser evaluation at an early stage into programs designed for the development of radiation-hardened parts. A quantitative correlation is obs...Show More
State of the art programmable devices are utilizing advanced processing technologies, non-standard circuit structures, and unique electrical elements in commercial-off-the-shelf (COTS)-based, high-performance devices. This paper discusses that the above factors, coupled with the systems application environment, have a strong interplay that affect the radiation hardness of programmable devices and ...Show More
Heavy ion testing on a scaled 256 K SRAM has shown that SEU analysis of the peripheral circuits as well as the memory cell must be performed as circuits are scaled to smaller and smaller dimensions. This paper describes the SEU, induced phenomena experienced by the scaled version of a previous 256 K radiation hardened SRAM design, affected by circuits in the periphery.<>Show More
Using fully-depleted technology, the Loral 256K SOI SRAM has demonstrated under worst case SEU and prompt dose testing an LET threshold of at least 80 MeV cm/sup /spl and/2//mg, and a prompt dose rate upset level of greater then 4E10 rad(Si)/s, respectively, without design hardening. Total dose testing on transistors fabricated on enhanced bond and etchback SOI substrates indicates over 100 krad(S...Show More
A radiation hardened 0.5 /spl mu/m Ultra Large Scale Integration (ULSI) technology was successfully developed to support the full scale production of a 1 Megabit Static Random Access Memory (1M SRAM). This ULSI technology represents the latest in a family of epitaxial bulk silicon CMOS used to produce 64 K SRAM, 256 K SRAM, an enhanced 256 K SRAM, and finally the 1M SRAM. A fast, electrically conf...Show More
The IBM 256 K SRAM is a high-performance, low-power device designed and fabricated in 0.8- mu m Enhanced Radiation-Hardened CMOS technology (RHCMOS-E). It is organized in a 32 K*8 or 256 K*1 configuration and is available with either CMOS or TTL input receivers. The device was developed to satisfy future space application requirements. Radiation testing indicates that the device meets or exceeds a...Show More