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Christian Gontrand - IEEE Xplore Author Profile

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Perovskite solar cells (PSCs) have drawn significant consideration as a competing solar cell technology because of the drastic advance in their power conversion efficiency (PCE) over the last two decades. The interfaces between the electron transport layer (ETL) and the absorber layer and between the absorber layer and the hole transport layer (HTL) have a major impact on the performance of the PS...Show More
In this article, a proposed 3-D cadmium telluride (CdTe) detector structure is presented and investigated. The electrical performance of the proposed structure is studied using 3-D TCAD simulations. The obtained results could be considered as a proof of concept for the feasibility of the performance of the presented detector under different operating conditions. For the proposed structure, the col...Show More
This paper presents the design and the fabrication of an ultra-thin vapor chamber exclusively composed of silicon, aimed to be integrated in microelectronic chips to spread high-density hot spots. A process flow fully compatible with the presence of a circuit on the front side has been developed and a 1 x 1 cm2 prototype with an internal vapor cavity and a wick thickness of 210 μm has been designe...Show More
In this paper, an analytical model of a proposed low-cost high efficiency NPN silicon-based solar cell structure is presented. The structure is based on using low cost heavily doped commercially available silicon wafers and proposed to be fabricated by the same steps as the conventional solar cells except an extra deep trench etch step. Moreover, the cell has been engineered to react to the UV spe...Show More
PIN diode is in fact a device used in a variety of applications for low frequencies up to high radio frequencies, such as photo detector, power rectifier, an RF switch, and applications of high voltage power electronics. Many available models and equations characterize static and transient simulation of PIN diodes. This paper presents a numerical time domain model for nanometric Silicon PIN diode....Show More
In this paper, a system of a hybrid pixel detector has been developed. The purpose is to create a flexible and reliable model that simulates the entire system, starting from a 3D detector to a data acquisition system and processing analysis. The model flexibility is achieved by minimizing interdependencies among its entities, so they can be added or removed as needed. The implementation of the sys...Show More
We propose here some insights of 3D integration modeling concerning electrical domain, applied to multi-layered silicon substrates. This work is motivated by the need to develop a more general analytical coupled tool in electrical field, which need to be manageable by the industry. First of all, we calculate the spreading impedance from any source. During the calculation, we use the Discrete Cosin...Show More
We apprehend, here, some insights into 3-D integration modeling, from a physical point of view, concerning electrical and temperature domains in transient regimes, applied to multilayered silicon substrates, as well as an insight into noise study. This paper is motivated by the need to develop more general analytical coupled solutions in these fields, manageable by the industry. It is also a track...Show More
This work presents a new proposal FPGA-based for low cost measurement of AM/AM and AM-PM distortion curves in RF Power Amplifiers through DSP Builder tool into a Development Board. A practical comparison between state-of-the-art reported works based on measurements of AM/AM and AM-PM distortion curves is discussed, in terms of low cost measurement, by using a FPGA development board and a PC to obt...Show More
In this paper we investigate a comprehensive analysis of Long Term Evolution Advanced (LTE) downlink (DL) physical layer performance using Multi Input Multi Output channel (MIMO) based on standard parameters. The work consists firstly in modeling LTE physical downlink shared channel (PDSCH). The developed model is based on an independent functional blocks in order to facilitate reproduction of sig...Show More
This paper is focused on the development of an emulation of a Memorial Polynomial Model (MPM) for Radio Frequency Power Amplifier (PA) with Artificial Neural Network (ANN) using back propagation algorithm (BP) considering the nonlinear and memory effects. This model is based on the accurate capacities of artificial neural networks to fit functions. We demonstrate that it is a practical tool to emu...Show More
In this paper is fully proved the behavior of the Volterra Series through a Memory-Polynomial Model (MPM) excited by QAM Input and implemented in an Radio Frequency Satellite Link (RFSL). Several sequences of 4-, 8-, 16-, 32 and 64-QAM Inputs were introduced to the MPM. The MPM as special truncation of the Volterra Series showed a correct behaviour for each QAM Input and the RFSL was able to stabi...Show More
In this work, we present a numerical modeling for a MOS transistor device. This motivated the present comprehensive study of its operations by accurate 2-D numerical simulations. All simulations codes are implemented using MATLAB code simulator. The numerical model is based on a finite-difference approximation of drift-diffusion model (DDM), which contains the Poisson equation and the carrier tran...Show More
In this paper, an nLDMOS and a pLDMOS are developed by slight modifications of the base process steps of 0.35μm BiCMOS technology. Extra two masks are used for the formation of the body region and the drift region with slightly added thermal budget and without resorting to high-tilt implants. The specific ON-resistance (RON,SP) and the OFF-state breakdown voltage(BV) are 1.5 mΩcm2 and 60V, for the...Show More
In this paper, an nLDMOS transistor is developed by slight modifications of the base process steps of 0.35μm BiCMOS technology. Extra two masks are used for the formation of the body region (LB-PWELL) and the drift region with slightly added thermal budget and without resorting to high-tilt implants. The proposed device has a breakdown voltage independent of the epitaxial layer thickness. The spec...Show More
Incorporation of carbon in SiGe has attracted great interest, which makes SiGeC based heterojunction transistors as an attractive device for high frequency applications. Carbon addition in SiGe dramatically reduces out-diffusion of boron caused by excess of interstitials generated by extrinsic base implantation. However carbon incorporation negatively influences the electrical device characteristi...Show More
SiGeC Heterojuncion Bipolar Transistor (HBT) BiCMOS technology represents a compelling low-cost, highly integrated, silicon-based solution for a wide variety of high-speed and low noise circuit and system applications, and is being aggressively developed around the world to support the global electronics infrastructure needed for the communications revolution. We report in this paper, the impact o...Show More
In 3D integrated circuits, substrate coupling effects due to propagation of high frequency (HF) parasitic signals are carried by through silicon vias (TSV). These electrical coupling leads to several impacts on performance of 3D circuits. In this paper, predictive HF electrical simulations are achieved by full wave analysis in order to make obvious the coupling effect due to TSVs presence. Solutio...Show More
The design and analysis of fully integrated Voltage Controlled Oscillators (VCO) for 20 GHz low cost and low power communication system is presented in this paper. Two differential topologies have been studied: balanced Colpitts VCO and LC-VCO using a cross-coupled differential pair. We have focussed on oscillation frequency, tuning range, phase noise, and output power optimization and buffer stag...Show More
The design and analysis of fully integrated voltage controlled oscillators (VCO) for 20 GHz low cost and low power communication system is presented in this paper. Two differential topologies have been studied: balanced Colpitts VCO and LC-VCO using a cross-coupled differential pair. We have focussed on oscillation frequency, tuning range, phase noise, and output power optimization and buffer stag...Show More
Here is a complete methodology of substrate noise modeling. The aim of this study is to predict the perturbations induced by digital commutations flowing through the substrate to reach sensitive analog blocks. Till now, the studies have only taking into account the parasitic elements of the bonding wires. This work consists of each part of a mixed-signal design that induces power-and-ground bounce...Show More
Digital signal slope incidences on coupling mechanisms and noise generation in mixed-signal integrated circuits are developed and illustrated by some SPICE simulations. The minimum transition concept on some signals should allow us to reduce the noise generated by the digital part of a system on chip. Some noise measurements on silicon, caused by single inverters, confirm that reducing the slope o...Show More
This work investigates substrate coupling effects in mixed IC's, especially the perturbations on RF block. The authors present the impact of low frequency substrate noise perturbations on voltage-controlled oscillator (VCO) spectrum. A 5 GHz VCO test-chip is presented; several substrate taps have been placed inside VCO core to measure or to inject noise perturbations. The oscillation frequency sen...Show More
The demand in fast electronics and in electronics high frequency permits the emergence of new types of components and notably the heterojunction bipolar transistor: the THB. Achieved initially from the III-V materials, this component permits to reach frequencies of working (of few tens GHz) until then inaccessible with the silicon bipolar components. Nevertheless, the electric performances of the ...Show More
Recent developments in very-large-scale integration (VLSI) technology have radically affected the design process based on DSP. Thus, in recent years, the development of application specific integrated circuit (ASIC) has made possible to integrate complex analog, digital and power circuits. The integration design of power electronic for the induction machines (IM) control is a difficult spot. This ...Show More