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A Comparative Study on Different Parameters of Priority Encoder in Different Design Styles in the era of VLSI
2024 4th International Conference on Advancement in Electronics & Communication Engineering (AECE)
Year: 2024 | Conference Paper |
Combinational logic circuits that compress two or more inputs into one or more outputs are called priority encoders. The most significant active line’s index is represented binarily as the priority encoder’s output. It is used to resolve errors with binary encoders that provide incorrect output when many input lines are active high. Priority encoder prioritizes every input level and assigns the pr...Show More
A Comparative analysis of different design styles of decoder for low power, high performance in the era of latest technologies: A review
2024 4th International Conference on Advancement in Electronics & Communication Engineering (AECE)
Year: 2024 | Conference Paper |
Decoders are extensively used in logical circuits, analogue to digital converters, for code conversions, de-multiplexing, data distribution and data routing applications where extremely small propagation delay is required. For better efficiency, low power, area, and delay consumptions various decoder techniques are used based on mixed-logic, nanometer FET technology and combinational decoders. The...Show More
GNRFET and RRAM Based Digital Gates in Ternary Logic
2023 3rd International Conference on Mobile Networks and Wireless Communications (ICMNWC)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
The designs of ternary logic circuits are proposed in this work. The ternary logics are considered as best technology than binary as it provides high-speed, low occupying area and low wire count, respectively. An efficient method is presented to develop the ternary gates utilizing furistic device technologies such as graphene nanoribbon field effect transistors (GNRFETs) and resistive random-acces...Show More
Design of Encoder based Half-Adder using GNRFET Technology in Ternary Logic
2023 International Conference on Next Generation Electronics (NEleX)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
The ternary logic technology is best alternative over the traditional binary logic. Because of it provides the simple and power efficiency in the circuits. The ternary logic circuits using graphene nanoribbon transistors (GNRFETs) are presented in this work. The encoder circuit is proposed that helps to develop the complex arithmetic circuits like adder, subtractor, multiplier and so on. In this p...Show More
Resource Allocation in Cross-Layer Wireless Communication Systems and Energy Efficiency Optimization
V. L. Manasa Mandalapu;P. Venkatramana;Deepa Bisht;Ramesh Singh Rawat;V. Malathy;Harwant Singh Arri
2023 6th International Conference on Contemporary Computing and Informatics (IC3I)
Year: 2023 | Conference Paper |
One of the key study areas for the advancement of 5G technology is green energy-saving communication. The allocation of framework resources and the optimization of energy efficiency are the means by which framework execution can be raised under the supposition of the broad inclusion of concentrated base stations. Subsequently, how to really control systems' energy utilization and resource allocati...Show More
Future Wireless Networks' Adaptive Resource Allocation Using Blockchain and Mobile Edge Computing
V. L. Manasa Mandalapu;P. Venkatramana;Neeti Misra;Sumit Pundir;V Malathy;Harwant Singh Arri
2023 6th International Conference on Contemporary Computing and Informatics (IC3I)
Year: 2023 | Conference Paper |
This study presents the B-MEC framework, which empowers adaptive resource conveyance and computational unloading in modern wireless networks by utilizing the block chain as a helper framework to complete administration and control exercises. The best strategy to get a comprehension of the areas while simultaneously ensuring the MEC and cryptographic cash structures' helpfulness is a fundamental te...Show More
Design of Three-valued Logic Half-Subtractor using GNRFET
2023 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI)
Year: 2023 | Conference Paper |
Cited by: Papers (2)
The design of three-valued schematics utilizing graphene nanoribbon field effect transistors (GNRFETs) is presented in this paper. Three-valued logic have various benefits over the conventional binary logic such as reduced area, reduced wire complexity, fast-arithmetic and logic operation and large bandwidth. In this work, the standard three-valued inverter (STI), NAND and half subtractor are pres...Show More
Design of SB-GNRFET and D-GNRFET using QuantumATK
2023 International Conference on Networking and Communications (ICNWC)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
In recent days, graphene nanoribbon field-effecttransistors (GNRFETs) are considered as promising candidate in semiconductor technology because it’s outstanding properties such as large mobility, strength, and electrical conductivity. The design of Schottky barrier GNRFET (SBGNRFET) and doped GNRFET (D-GNRFET) are presented in this work to investigate their performance in terms of ON and OFF curre...Show More
Breast Cancer Classification using Customized ResNet based Convolution Neural Networks
Nagaraja Rao Pamula Pullaiah;Dorai Venkatasekhar;Padarthi Venkatramana
2022 International Conference on Knowledge Engineering and Communication Systems (ICKES)
Year: 2022 | Conference Paper |
Deep learning is the most frequently used tool in the classification of tumors in medical applications. In recent decades, many research works have been done on the Breast Imaging Reporting & Data System (BI-RADS) atlas based classification of Breast cancer. As reported in the existing research works, training the larger datasets is a challenging task. Therefore, a customized ResNet based Convolut...Show More
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