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Study of PWB Metal Surface Roughness Influence on GDDR6 Memory Data Transmission at 16 Gbps
2024 IEEE Symposium on Industrial Electronics & Applications (ISIEA)
Year: 2024 | Conference Paper |
This paper introduces Graphics Double Data Rate 6 Synchronous Graphics Random Access Memory (GDDR6 SGRAM) and its application in graphics processing unit (GPU). Besides that, this paper also describes the concept of metal surface roughness and skin effect in printed wiring board (PWB) stack-up and its influence on GDDR6 memory interface in terms of signal integrity. In later section of this paper,...Show More
Achieving minimal PWB link loss due to fiber weave influence for multi-Gigabit transmission
2023 IEEE International Symposium On Antennas And Propagation (ISAP)
Year: 2023 | Conference Paper |
This paper investigates the printed wiring board (PWB) laminate fiber weave influence on differential signal integrity for 20 Gbps transmission. The influence of non-homogenous PWB laminate segment ratio within the fiber weave on signal integrity is investigated with two-dimensional electromagnetic (2DEM) modeling in Advanced Design System, followed by analyzing the line impedance, link loss (Sdd2...Show More
Paving the Way for 64 Gbps PCIe 6.0 End to End Physical Link Compliance in Multi-board Digital System
2023 IEEE 13th Symposium on Computer Applications & Industrial Electronics (ISCAIE)
Year: 2023 | Conference Paper |
This paper introduces the four-level pulse amplitude modulation (PAM-4) and its implementation in Peripheral Component Interconnect Express (PCIe) 6.0 communication protocol, to facilitate the large volume of high-resolution data traffic in multi board digital electronic system, such as computing server and modular test instrument platform. Besides that, the link loss budget of each system compone...Show More
Complementary Technique of Flight Time Compensation for 6.4 Gbps DDR5 Transmission Link on Dense PCB
2022 International Conference on Engineering and Emerging Technologies (ICEET)
Year: 2022 | Conference Paper |
In this paper, a complementary technique to compensate and match the flight time or propagation delay of the signals in DDR5 memory bus system on dense printed circuit board (PCB) is proposed. The matched flight time among the traces is achieved with multiple layer transitions using micro vias. This approach complements the conventional serpentine routing in PCB with limited board real estate. The...Show More
The Advantages of Substituting Decoupling Capacitors on PWB with Embedded Capacitance Technology
2020 IEEE International RF and Microwave Conference (RFM)
Year: 2020 | Conference Paper |
This paper discusses the importance of power delivery network (PDN) with minimal level of impedance on the printed wiring board (PWB) with multi-Gigabit signal transmission and the effect of embedded capacitance material (ECM) in reducing the PDN impedance across the wideband range. The advantages of applying ECM versus discrete decoupling capacitors on compact PWB in terms of physical real estate...Show More
Achieving Minimal PDN Impedance, SSN and Jitter on PCB with Embedded Capacitance Material
2018 IEEE International RF and Microwave Conference (RFM)
Year: 2018 | Conference Paper |
Cited by: Papers (2)
In this paper, the imperativeness of low power distribution network (PDN) impedance on printed circuit board (PCB) with high frequency signals operating at hundreds of Mega-Hz range and the impact of embedded capacitance material (ECM) in minimizing wideband PDN impedance are discussed. The study to compare the performance of PCB with ECM versus conventional dielectric FR4 material was conducted w...Show More
Essential board design considerations for 1.6GHz DDR4 transmission
Chang Fei Yee;Asral Bin Bahari Jambek;Azremi Abdullah Al-Hadi
2015 IEEE International RF and Microwave Conference (RFM)
Year: 2015 | Conference Paper |
This paper discusses the major considerations or challenges in designing DDR4 memory interface on printed circuit board (PCB). The three key design aspects to be considered are trace stub due to fan-out at receiving end, signal crosstalk and crossing of trace over split-plane. These three key considerations are crucial to the signal integrity of the high speed data transmission. They are studied w...Show More
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