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Haoyun Jiang - IEEE Xplore Author Profile

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Author details

Haoyun Jiang

Publications

19

Citations

129

Publications by Year

20172023

Co-Authors:

Xinyu BaoXiucheng HaoHeyi LiHuailin LiaoJunhua Liu

Show All Co-Authors (21)

Haoyun Jiang

Affiliation

School of Integrated Circuits

Peking University

Beijing, China

Publication Topics

Phase Noise,
Phase-locked Loop,
Parasitic Capacitance,
Time-to-digital Converter,
40-nm CMOS,
Chip Area,
Chirp Bandwidth,
Frequency Modulated Continuous Wave,
Frequency Of Errors,
Frequency Synthesizer,
High Linearity,
High Power Consumption

Biography

Haoyun Jiang was born in Liaoning, China, in 1993. He received the B.S. degree in microelectronics and the Ph.D. degree from the School of Integrated Circuits, Peking University, Beijing, China, in 2016 and 2022, respectively.,His current research interests include RF and analog circuit design, including digital-to-time converters, phase shifters, and CMOS RF transmitters.(Based on document published on 11 July 2023).

Publications

19

Citations

129

Publications by Year

20172023

Co-Authors:

Xinyu Bao
Xiucheng Hao
Heyi Li
Huailin Liao
Junhua Liu

Show All Co-Authors (21)

Author's Published Works

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Showing 1-19 of 19 results

Conferences (14)

Journals (5)

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Haoyun Jiang(19)
Junhua Liu(19)
Huailin Liao(18)
Zexue Liu(13)
Heyi Li(12)
Institute of Microelectronics, Peking University, Beijing, China(3)
Key Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics, Peking University, Beijing, China(3)
Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, China(2)
Peking University, Beijing, China(2)
Key Laboratory of Microelectronic Devices and Circuits (MOE), Peking University, Beijing, China(2)
2018 IEEE International Symposium on Circuits and Systems (ISCAS)(4)
2019 IEEE International Symposium on Circuits and Systems (ISCAS)(3)
IEEE Transactions on Circuits and Systems I: Regular Papers(3)
2017 IEEE International Symposium on Circuits and Systems (ISCAS)(1)
2019 China Semiconductor Technology International Conference (CSTIC)(1)
IEEE(19)
Media(3)
Florence, Italy(4)
Sapporo, Japan(3)
Baltimore, MD, USA(1)
Busan, Korea, Republic of(1)
Kyoto, Japan(1)
Power Consumption(11)
Phase-locked Loop(9)
High Linearity(8)
Phase Noise(8)
Parasitic Capacitance(7)

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An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array

Dong Wang;Jiazheng Zhou;Hui Xu;Ningyuan Zhang;Xiaolei Su;Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Junhua Liu;Huailin Liao

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Year: 2023 | Conference Paper |

Cited by: Papers (1)

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The first Ka-band DTX-based bit-to-RF multi-beam transmitter array is demonstrated in this work. The DTX IC features a prototype digital outphasing architecture with a 4x frequency multiplication scheme and a piecewise varactor array (PVA) linearization technique. Further, a compact wideband ADPLL with 24-bit phase shifting is integrated, eliminating the high-frequency LO distribution and improvin...Show More

An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array

Dong Wang;Jiazheng Zhou;Hui Xu;Ningyuan Zhang;Xiaolei Su;Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Junhua Liu;Huailin Liao

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Year: 2023 | Conference Paper |

A 2.85-mm2 Wideband RF Transceiver in 40-nm CMOS for IoT Micro-Hub Applications

Dong Wang;Zexue Liu;Yi Tan;Chen Xu;Heyi Li;Haoyun Jiang;Xinyu Bao;Yixiao Wang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2023 | Volume: 70, Issue: 10 | Journal Article |

Cited by: Papers (3)

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This paper presents a 2.85-mm2 0.4-6 GHz RF transceiver in 40-nm CMOS for low-cost and low-power IoT micro-hub applications. A single-path receiver (RX), an all-digital phase-locked loop (ADPLL), and a digital transmitter (DTX) (including a digital power amplifier, DPA) are integrated. In the RX, to reduce the chip area and power consumption, an inductor-less capacitive-feedforward wideband LNA an...Show More

A 2.85-mm2 Wideband RF Transceiver in 40-nm CMOS for IoT Micro-Hub Applications

Dong Wang;Zexue Liu;Yi Tan;Chen Xu;Heyi Li;Haoyun Jiang;Xinyu Bao;Yixiao Wang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2023 | Volume: 70, Issue: 10 | Journal Article |

A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope

Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Zherui Zhang;Junhua Liu;Huailin Liao

IEEE Journal of Solid-State Circuits

Year: 2022 | Volume: 57, Issue: 7 | Journal Article |

Cited by: Papers (6)

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A 24 GHz self-calibrated all-digital frequency-modulated continuous-wave (FMCW) synthesizer is presented in this article. A multi-bank digitally controlled oscillator (DCO) is employed to provide adequate frequency tuning range and high frequency resolution. A full background self-calibration scheme is proposed to linearize the DCO tuning curve for highly linear and fast chirp generation. An overl...Show More

A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope

Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Zherui Zhang;Junhua Liu;Huailin Liao

IEEE Journal of Solid-State Circuits

Year: 2022 | Volume: 57, Issue: 7 | Journal Article |

A 2.85mm2 RF Transceiver in 40nm CMOS for IoT Micro-Hub Applications

Zexue Liu;Yi Tan;Chen Xu;Heyi Li;Haoyun Jiang;Xinyu Bao;Dong Wang;Junhua Liu;Huailin Liao

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Year: 2021 | Conference Paper |

Cited by: Papers (1)

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With the development of wireless communication and Internet-of-Things (IoT), many new communication protocol standards have emerged. IoT micro-hub, which acts as the bridge between ubiquitously deployed IoT terminals and the Internet, is becoming a critical part of IoT [1]. RF transceivers for IoT micro-hub applications are now facing several technical challenges. Firstly, they should be highly re...Show More

A 2.85mm2 RF Transceiver in 40nm CMOS for IoT Micro-Hub Applications

Zexue Liu;Yi Tan;Chen Xu;Heyi Li;Haoyun Jiang;Xinyu Bao;Dong Wang;Junhua Liu;Huailin Liao

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Year: 2021 | Conference Paper |

32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope

Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Zherui Zhang;Junhua Liu;Huailin Liao

2021 IEEE International Solid-State Circuits Conference (ISSCC)

Year: 2021 | Conference Paper |

Cited by: Papers (18)

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Frequency synthesizers are critical for millimeter-wave (mm-wave) frequency-modulated continuous-wave (FMCW) radars. Large-chirp-bandwidth (BWchirp) sawtooth waveforms are required to be synthesized with fast slope and high-frequency linearity for accurate detection of targets or high-quality imaging. Fractional-N phase-locked loops (PLLs) with a two-point-modulation (TPM) scheme are widely used t...Show More

32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope

Zhengkun Shen;Haoyun Jiang;Fan Yang;Yixiao Wang;Zherui Zhang;Junhua Liu;Huailin Liao

2021 IEEE International Solid-State Circuits Conference (ISSCC)

Year: 2021 | Volume: 64 | Conference Paper |

A 12-Bit 0.5–2.4-GHz 0.65°-Peak-INL Parasitic-Insensitive Digital-to-Phase Converter

Haoyun Jiang;Zhengkun Shen;Dong Wang;Xiucheng Hao;Zexue Liu;Yi Tan;Junhua Liu;Huailin Liao

IEEE Microwave and Wireless Components Letters

Year: 2021 | Volume: 31, Issue: 1 | Journal Article |

Cited by: Papers (5)

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A 12-bit 0.5–2.4-GHz parasitic-insensitive digital-to-phase converter (DPC) with high linearity is presented in this letter. A modified parasitic-insensitive charge-based (PICB) phase interpolator (PI) is proposed to avoid linearity degradation caused by parasitic effect. A novel PI cell with separated clock selecting logic is implemented to solve charge leakage and overcharging problem. The DPC i...Show More

A 12-Bit 0.5–2.4-GHz 0.65°-Peak-INL Parasitic-Insensitive Digital-to-Phase Converter

Haoyun Jiang;Zhengkun Shen;Dong Wang;Xiucheng Hao;Zexue Liu;Yi Tan;Junhua Liu;Huailin Liao

IEEE Microwave and Wireless Components Letters

Year: 2021 | Volume: 31, Issue: 1 | Journal Article |

A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity

Zhengkun Shen;Haoyun Jiang;Heyi Li;Zherui Zhang;Fan Yang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2020 | Volume: 67, Issue: 12 | Journal Article |

Cited by: Papers (19)

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A novel all-digital phase-locked loop (ADPLL) for fast and high-linear FMCW signal generation is presented in this paper. Fast chirp slope is enabled by two-point modulation (TPM) technique and ramp linearity distortion induced by digitally- controlled oscillator (DCO) is suppressed by wide loop bandwidth. A calibration-free retiming fractional frequency dividing (FFD) scheme based on digital phas...Show More

A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity

Zhengkun Shen;Haoyun Jiang;Heyi Li;Zherui Zhang;Fan Yang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2020 | Volume: 67, Issue: 12 | Journal Article |

A 0.5-V 3.69-nW Complementary Source-Follower-C Based Low-Pass Filter for Wearable Biomedical Applications

Zexue Liu;Yi Tan;Heyi Li;Haoyun Jiang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2020 | Volume: 67, Issue: 12 | Journal Article |

Cited by: Papers (37)

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Ultra-low-power circuits that can work under a low-voltage supply are in great demand in future wearable biomedical applications, which tend to be integrated with low-output-voltage energy harvesting devices. In this paper, we present a low-voltage low-power continuous-time low-pass filter (CT-LPF), which is indispensable in biomedical systems. When a low-voltage supply is used, it is necessary to...Show More

A 0.5-V 3.69-nW Complementary Source-Follower-C Based Low-Pass Filter for Wearable Biomedical Applications

Zexue Liu;Yi Tan;Heyi Li;Haoyun Jiang;Junhua Liu;Huailin Liao

IEEE Transactions on Circuits and Systems I: Regular Papers

Year: 2020 | Volume: 67, Issue: 12 | Journal Article |

A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider

Zhengkun Shen;Heyi Li;Haoyun Jiang;Zherui Zhang;Junhua Liu;Huailin Liao

2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Year: 2019 | Conference Paper |

Cited by: Papers (7)

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A 12-GHz all-digital calibration-free frequency-modulated continuous-wave (FMCW) signal generator is presented in this paper based on a retiming fractional frequency divider (FFD). Instead of modulating a multi-modulus divider (MMD) by a ΔΣ modulator, a fractional divider is utilized to release the narrow loop bandwidth limitation and achieve better phase noise without active noise cancellation te...Show More

A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider

Zhengkun Shen;Heyi Li;Haoyun Jiang;Zherui Zhang;Junhua Liu;Huailin Liao

2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Year: 2019 | Conference Paper |

A 1.3-µW −0.3/+0.27°C Inaccuracy Fully-integrated Temperature Sensor Based on a Pre-Charge Relaxation Oscillator for IoT applications

Yi Tan;Zexue Liu;Xiucheng Hao;Zhengkun Shen;Haoyun Jiang;Fan Tian;Junhua Liu

2019 IEEE Asia-Pacific Microwave Conference (APMC)

Year: 2019 | Conference Paper |

Cited by: Papers (5)

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This paper presents a CMOS fully-integrated temperature sensor based on a relaxation oscillator for IoT applications. To reduce power consumption, this sensor utilizes the half-period pre-charge compensation relaxation oscillator and uses a time-to-digital convertor (TDC) instead of analog-to-digital convertor (ADC) to count. Besides, the current distribution circuit is employed to improve tempera...Show More

A 1.3-µW −0.3/+0.27°C Inaccuracy Fully-integrated Temperature Sensor Based on a Pre-Charge Relaxation Oscillator for IoT applications

Yi Tan;Zexue Liu;Xiucheng Hao;Zhengkun Shen;Haoyun Jiang;Fan Tian;Junhua Liu

2019 IEEE Asia-Pacific Microwave Conference (APMC)

Year: 2019 | Conference Paper |

A Low Power 0.4-1 Ghz Receiver Front-End with an Enhanced Third-Order-Harmonic-Rejecting Series N-Path Filter

Zexue Liu;Heyi Li;Yi Tan;Haoyun Jiang;Junhua Liu;Huailin Liao

2019 China Semiconductor Technology International Conference (CSTIC)

Year: 2019 | Conference Paper |

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In this paper, a low power 0.4-1 GHz receiver front-end (RX-FE) with an enhanced third-order-harmonic-rejecting series N-path filter (3rd-HRSNPF) is proposed. The 3rd-HRSNPF provides sufficient third order harmonic rejection (HR3) to eliminate the harmonic rejection mixer (HRM). The receiver front-end has been implemented in a 40 nm CMOS technology. Simulation results show that it achieves a HR3 o...Show More

A Low Power 0.4-1 Ghz Receiver Front-End with an Enhanced Third-Order-Harmonic-Rejecting Series N-Path Filter

Zexue Liu;Heyi Li;Yi Tan;Haoyun Jiang;Junhua Liu;Huailin Liao

2019 China Semiconductor Technology International Conference (CSTIC)

Year: 2019 | Conference Paper |

A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator

Haoyun Jiang;Zherui Zhang;Zhengkun Shen;Xiucheng Hao;Zexue Liu;Heyi Li;Yi Tan;Qiang Zhou;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

Cited by: Papers (2)

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This paper presents a fractional-N all digital phase locked loop (ADPLL) using a retiming high linear digital phase interpolator (DPI), which is free from pre- and background-calibration. The DPI utilizes a charge-sharing effect insensitive charge-based structure to improve the linearity. Designed in a 40-nm CMOS technology, the proposed DPI achieves 9-bit resolution, 0.3ps integral nonlinearity (...Show More

A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator

Haoyun Jiang;Zherui Zhang;Zhengkun Shen;Xiucheng Hao;Zexue Liu;Heyi Li;Yi Tan;Qiang Zhou;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS

Zhengkun Shen;Zexue Liu;Haoyun Jiang;Yi Tan;Heyi Li;Xiucheng Hao;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

Cited by: Papers (6)

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This paper presents an 8-bit calibration-free LO-path phase shifter (PS) for large scale 28 GHz phased-array transceiver. To overcome the nonlinearity of a vector-summing PS, two 8-bit digitally-controlled variable gain amplifier are utilized to generate high linearity amplitude modulation. Three transformers cooperating with a parallel resonator are developed to sum the I/Q signal as well as prov...Show More

A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS

Zhengkun Shen;Zexue Liu;Haoyun Jiang;Yi Tan;Heyi Li;Xiucheng Hao;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

A 0.5-V Ultra-Low-Power Low-Pass Filter with a Bulk-Feedback Technique

Zexue Liu;Zhengkun Shen;Yi Tan;Haoyun Jiang;Heyi Li;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

Cited by: Papers (8)

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In wearable biomedical applications, a constant dc common-mode (CM) voltage of low-pass filters (LPFs) is needed to boost the dynamic range when low supply voltage is used for high power efficiency. Traditional source-follower based LPFs consume very low power but introduce a CM voltage difference between input and output. This paper presents an ultra-low-power LPF, which features a source-followe...Show More

A 0.5-V Ultra-Low-Power Low-Pass Filter with a Bulk-Feedback Technique

Zexue Liu;Zhengkun Shen;Yi Tan;Haoyun Jiang;Heyi Li;Junhua Liu;Huailin Liao

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2019 | Conference Paper |

A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator

Haoyun Jiang;Zexue Liu;Xiucheng Hao;Zherui Zhang;Zhengkun Shen;Heyi Li;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

Cited by: Papers (4)

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A 12-bit 2.5GHz digital-to-time converter (DTC) for high resolution and high linearity applications is presented in this paper. The DTC is segmented into a 4-bit coarse stage and an 8-bit fine stage. The proposed fine stage utilizes parasitic-insensitive charge-based (PICB) phase interpolator (PI) with significant improvement in linearity. The PICB PI outputs 50% duty cycle differential clock and ...Show More

A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator

Haoyun Jiang;Zexue Liu;Xiucheng Hao;Zherui Zhang;Zhengkun Shen;Heyi Li;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

A Low Power SAW-less 2.4-GHz Receiver with an LC Matched Series N-path Filter

Zexue Liu;Heyi Li;Haoyun Jiang;Xiucheng Hao;Yi Tan;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

Cited by: Papers (2)

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This paper presents a low power SAW-less 2.4-GHz receiver for short-range communications. To ensure sufficient out-of-band (OOB) linearity for SoC existence, a LC matched series N-path filter based receiver topology is proposed. The radio frequency input is followed by the LC matched series N-path filter, which provides sufficient ultimate rejection when consuming less power than conventional N-pa...Show More

A Low Power SAW-less 2.4-GHz Receiver with an LC Matched Series N-path Filter

Zexue Liu;Heyi Li;Haoyun Jiang;Xiucheng Hao;Yi Tan;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler

Xiucheng Hao;Hao Zhang;Zhengkun Shen;Zexue Liu;Luyao Zhang;Haoyun Jiang;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

Cited by: Papers (3)

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This paper proposes a 2.4 GHz ultra-low power pseudo-backscatter modulator with an integrated directional coupler for wireless sensor network applications. In order to improve the performance of backscatter modulator for multilevel modulation, an integrated directional coupler is employed to isolate the radio frequency carrier wave from the modulated signal. As a result, the carrier wave can be mo...Show More

A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler

Xiucheng Hao;Hao Zhang;Zhengkun Shen;Zexue Liu;Luyao Zhang;Haoyun Jiang;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL

Zherui Zhang;Heyi Li;Fan Yang;Haoyun Jiang;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

Cited by: Papers (1)

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This paper presents a digital phase noise cancelling scheme for ring oscillator (RO)-based fractional-N ADPLL, which can suppress both in-band and out-of-band phase noise of RO. The scheme adopts a high-resolution time-to-digital convertor (TDC) to sample the rising edge timing errors between RO output and the reference signal (REF) and a matched digital-to-time convertor (DTC) to compensate these...Show More

A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL

Zherui Zhang;Heyi Li;Fan Yang;Haoyun Jiang;Junhua Liu;Huailin Liao

2018 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2018 | Conference Paper |

An 89 μW MICS/ISM band receiver for ultra-low-power applications

Zexue Liu;Fan Yang;Haoyun Jiang;Xiucheng Hao;Junhua Liu;Huailin Liao

2017 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2017 | Conference Paper |

Cited by: Papers (1)

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This paper presents a MICS/ISM band receiver for ultra-low-power applications with a passive RF front-end. A shunt passive mixer along with low input capacitance amplifiers is introduced to decrease the large load capacitor and minimize power consumption of the Local Oscillator (LO) buffers without significant noise figure (NF) degradation. Measurement results show that the receiver consumes 89 μW...Show More

An 89 μW MICS/ISM band receiver for ultra-low-power applications

Zexue Liu;Fan Yang;Haoyun Jiang;Xiucheng Hao;Junhua Liu;Huailin Liao

2017 IEEE International Symposium on Circuits and Systems (ISCAS)

Year: 2017 | Conference Paper |

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