Comparative study of single Material gate and Dual Material gate Silicon-On-Insulator Junctionless Transistors

A Dual material gate silicon on Insulator Junctionless Transistor (DMG SOI JLT) is proposed in this paper. It's characteristics is demonstrated & compared with a single Material gate Silicon On Insulator Junctionless Transistor (SMG SOI JLT) using EDA tools used for simulation. The result shows that the DMG-SOI JLT has current driving capability higher than the single Material gate silicon on Insulator junctionless Transistor. The potential distribution of DMG SOI JLT has an abrupt change the transition of two gates and enhances the electric field in the channel. The channel length decrease then DIBL and sub threshold slope variation is minimum in DMG SOI JLT compare to SMG SOI JLT. Transconductance of SMG SOI JLT is observed 0.25mS for channel length 20nm.

I. Introduction

The conventional Metal Oxide Semiconductor field effect transistors (MOSFETs) have short channel effect problem due to continuous decreases of device sizes at nano scale regime. However, when the channel length shrinks it reduces the controllability of the gate over the depletion region by increased charge sharing from source/drain. Short channel effect such as threshold voltage roll-off and Drain Induced Barrier Lowering (DIBL). Multi-gate devices such as gate-all-around Si nano-wires and FinFETs are promising candidates for CMOS downscaling. Conventional MOSFET devices formation of source and drain junctions has big challenges on doping techniques and thermal budget. To overcome these challenges as an, alternative junction-less devices with uniform doping concentration [2] is the better candidate their electrical characteristics have been analyzed and studied [7].