Evaluation of high voltage cascode GaN HEMTs in parallel operation

Paralleling devices is an effective way to achieve higher power applications while still having the convenience brought by discrete devices. However, very few papers investigate the challenges of paralleling Gallium Nitride high electron mobility transistors (GaN HEMTs) in cascode configuration, especially the potential failure modes and its related mechanisms. In this paper, a comprehensive study on paralleled high voltage cascode GaN HEMTs is presented. The influence of paralleling cascode GaN HEMTs on the circuit's stray inductance is studied. Potential operation failure modes and the mechanisms of the cascode GaN HEMTs parallel operation were analyzed in detail. The Ansoft Q3D FEA tool and SPICE-based simulation model were used together to quantify the impacts of the circuit and device mismatch on the paralleled GaN HEMTs operation. The SPICE model is validated by the experimental results.

I. Introduction

Compared to the enhancement mode (E-mode) GaN device, the depletion mode (D-mode) GaN device has a simpler device structure. However, the normally-on property of the D-mode GaN device is not preferred in applications because of the complicated driver designs and potential shoot-through risks. In order to fully utilize the advantages offered by the GaN HEMT, manufactures like Transphorm, RFMD and Infineon started to provide high voltage normally-off GaN HEMTs in the cascode structure to the research institutes and market. The schematic of the D-mode GaN HEMT in cascode structure is shown in Fig. 1. The one drawback is that they are mostly available in lower current ratings. For this reason, there is a great desire to parallel them for higher power applications [1]–[2].