I. INTRODUCTION
The development of digital integrated circuit has put forward urgent demands for test technology. The high reliability of MCM is due to that bare integrated circuit chips are welded and interconnected under high density and small dimension condition [1]. But it is also hard to resolve the problem of MCM interconnect test. Various deterministic interconnecting algorithms have been studied during recent years. We describe the performance of some representative algorithms as follows. For Counting Sequence Algorithm (CSA) [2], vectors are optimal for detecting all shorts in a circuit of N nets, while Modified Counting Sequence Algorithm (MCSA) needs [3] vectors for testing all faults. In order to make the fault coverage rate equal to 100%, True/Compliment Algorithm (T/CA) generate [4] test vectors; Walking One's Algorithm (WOA) is a very common test approach for interconnect testing, whose test set length is N [4].