Frequency and recovery effects in high-κ BTI degradation

Net end-of-life aging prediction under realistic use conditions is the key objective for any product aging model. In this paper, a net degradation model is introduced and effects such as recovery, subsequent degradation, frequency, duty cycle, and recovery bias are evaluated. The high-kappa recovery behavior observed is consistent with SiO₂ gate stacks, which allows the use of SiO₂ models to predict recovery in both NMOS and PMOS high-kappa transistors.

I. Introduction

There has been considerable effort to understand the physics guiding BTl recovery in PMOS transistors, but relatively few studies focusing on the net degradation accrued at end-of-life (EOL) in both PMOS and NMOS transistors under realistic use conditions. In this work, PMOS and NMOS transistors were aged with various stress and recovery waveforms that highlight the influence of recovery on EOL degradation. The effects of duty cycle, frequency, recovery time, and recovery bias are explored, and a comprehensive model formulated to predict EOL behavior.