Hardware Dedicated Integer-Pel Motion Estimator for High Definition H.264/AVC Video Encoder

This paper presents a hardware oriented algorithm and its architecture of an integer-pel motion estimation for H.264/AVC. Proposed motion estimation architecture has a capability of real-time processing for 1080@60P with 2 reference frames and a search range of [-2048, +2047] in the horizontal and [-64, +63] in the vertical direction at the operating frequency of 266 MHz.

I. INTRODUCTION

In H.264/AVC [1] video encoder, integer-pel motion estimation (IPME) requires 74.29% computation and 77.49% memory access in the instruction profile [2]. Motion estimation of H.264/AVC has several new features, variable block sizes and multiple reference frames. Those features make motion estimation of H.264/AVC several times more complex than those in previous standards. Moreover, consumers are increasingly expecting HD video recording due to the popularization of digital HDTV with rapidly falling price. Therefore, the architecture design of IPME is very challenging according to the increase of both complexity of standards and demand of HD video quality. A hardware oriented fast algorithm and efficient hardware architecture are eagerly demanded to reduce both the computational complexity and the memory bandwidth for real-time applications of @60P.