A 480-MHz to 1-GHz sub-picosecond clock generator with a fast and accurate automatic frequency calibration in 0.13-µm CMOS

In this paper, an ultra-low jitter clock generator that employs a novel automatic frequency calibration (AFC) technique is presented. To achieve low jitter, the clock generator uses an LC-VCO with 5-bit switched tuning scheme. The clock output is taken from the output of a multi-modulus divider, which increases the output frequency range with small variation in the loop bandwidth. The capacitor array of the the VCO is controlled by a novel AFC technique that performs binary search for fast calibration and fine search to select an optimum tuning curve. A prototype chip implemented in 0.13-µm CMOS process achieves 480 MHz to 1 GHz of output frequency while consuming 22 mW from a 1.2 V supply. The measured rms jitter and calibration time of the proposed clock generator are 940 fs at 600 MHz and 350 ns, respectively. These numbers are the fastest calibration time and one of the lowest jitter that have been reported in a clock generator.

I. Introduction

Reduction of clock jitter is essential to enhance the performance of the integrated circuits, since jitter degrades the timing margin of digital circuits and the accuracy of analog circuits. In the area of clock generators, ring VCOs have been widely used due to their small area and wide frequency range [1], [2]. However, for applications that require ultra-low jitter of less than 0.1%, LC-VCOs are better suited [3], [4] since ring VCOs have limitation in their minimum achievable jitter [5]. Unfortunately, LC-VCOs have limited tuning range and the phase noise of the PLL can be large when a single varactor is used in the LC tank, due to the large VCO gain . To solve these problems, we propose an LC-VCO based clock generator with a novel automatic frequency calibration (AFC) technique. To increase the frequency range, the output is taken from the divider, rather than the VCO. To lower the , the LC-VCO uses 5-bit capacitor array for switched tuning controlled by a novel AFC. Unlike recent previous AFCs that have long calibration time and select a non-optimum tuning curve [6], [7], the proposed scheme performs binary search with an optimality test so that optimum tuning curve can be quickly selected.