I. Introduction
The twin standards SAE J1752/3 [1] and IEC 61967–2 [2] describe procedures for evaluating the electromagnetic compatibility of integrated circuits (ICs). These procedures call for the IC to be mounted on a 10-cm × 10-cm printed circuit board with the IC being evaluated on one side and the other components needed to exercise the IC on the other side. The board is mounted in the wall of a small TEM (or GTEM) cell with the IC side facing in. Voltage measured on one end of the cell is used to evaluate the performance of the IC from 150 kHz to 1 GHz.