On the modeling and analysis of jitter in ATE using Matlab

This paper presents a new jitter component analysis method for mixed mode VLSI chip testing in automatic test equipment (ATE). The separate components are analyzed individually and then combined using Matlab. The Matlab simulation shows how jitter components combine and how the total jitter depends on the jitter injection sequence. The relationship among jitter components is presented and the superposition of the jitter components is verified. This new technique gives test engineers an insight into how the jitter components interact.

1. Introduction

As the data rates of VLSI systems reach several gigabits per second, timing jitter have become more significant in ATE (Automatic Test Equipment) systems. Therefore, a correct model and analysis of the timing errors and jitter will provide more accurate characterizations of high-speed VLSI systems.