H∞ Anti-Disturbance Bumpless Transfer Control for Switched Affine Systems With Its Application to a Circuit Model

This brief concentrates on the problem of $H_{\infty }$ anti-disturbance bumpless transfer control (ADBTC) of switched affine systems (SASs) with multiple types of disturbances. The $H_{\infty }$ ADBTC strategy is put forward to achieve the bumpless transfer (BT) performance and the anti-disturbance performance, simultaneously. First, a more general switched affine disturbance observer is designed to estimate the external disturbances generated from the external SASs. Secondly, a novel BT performance constraint containing the system state, the disturbance observer state, and the affine terms is proposed to suppress the control bumps. Thirdly, a switched anti-disturbance BT controller and a state-dependent switching law are constructed. Then a solvable condition for the $H_{\infty }$ ADBTC problem of SASs is derived. Finally, the proposed control scheme is validated by an example of a circuit model.

I. Introduction

As a special switched systems (SSs), switched affine systems (SASs) composed of a set of subsystems with affine terms (ATs) and switching signals have received more and more attention owing to their importance in both science fields and engineering applications [1], [2]. The ATs that exist in SASs make the equilibrium point different for each subsystem, which renders the stability analysis and control design more complicated than conventional SSs. Generally, fast switching is needed to achieve the asymptotic stability of the desired equilibrium point [3], [4].