Showing 1-25 of 72 resultsfor "Index Terms":Multi-level Fault Simulation
"Index Terms":Multi-level Fault Simulation
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Fault simulation in a multilevel environment: the MOZART approach
[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers
Year: 1988 | Conference Paper |
Cited by: Papers (1)
MOZART is a concurrent fault simulator for large circuits described at the RT, functional, gate, and switch levels. Performance is gained by means of techniques aimed at the reduction of unnecessary activity. Two such techniques are levelized two-pass simulation, which minimizes the number of events and evaluations, and list event scheduling, which allows optimized processing of simultaneous (frat...Show More
Research on a Hybrid DC Circuit Breaker with Multi-stage Capacitor Commutation
2024 3rd Asia Power and Electrical Technology Conference (APET)
Year: 2024 | Conference Paper |
With the widespread application of high-voltage direct current (HVDC) transmission systems in power grids, the need for fast and safe interruption of fault currents has become an urgent technical challenge. This paper proposes a hybrid DC circuit breaker based on multi-level capacitive commutation, which optimizes the interruption performance under various fault current conditions by paralleling d...Show More
Research on a Hybrid DC Circuit Breaker with Multi-stage Capacitor Commutation
Year: 2024 | Conference Paper |
Research on improving the fault simulation accuracy of Modular Multilevel Converters
2021 IEEE 16th Conference on Industrial Electronics and Applications (ICIEA)
Year: 2021 | Conference Paper |
The digital real-time simulation-based function and dynamic performance tests of the modular multi-level converter (MMC) control and protection systems have become an important method to ensure the safety and reliability of the MMC-HVDC projects, of which the real-time simulation model of the MMC is one of the key factors affecting the test effect. Currently, the MMC models are generally implement...Show More
VPWM-Based DC Voltage Balancing and Fault Diagnosis Method for a Cascaded H-Bridge Multilevel Converter
2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
In the DC voltage balancing control of a cascaded H-bridge multilevel converter, the frequently used PI controllers have complicated parameter tuning and cause the balancing ability to degrade under the switch fault condition. Regarding this, a space vector pulse width modulation-based DC voltage balancing method is presented to flexibly adjust the cell voltage levels and maintain the DC voltage b...Show More
Analysis on Protection Coordination of OCRs Using Voltage Components for the Application of SFCL in a Power Distribution System with DG
As the importance of renewable energy increases, the capacity of dispersed generations (DGs) has increased worldwide. However, the connection of DGs in the power distribution system can cause the fault current to increase as well as malfunction of the overcurrent relay (OCR) due to the reverse directional fault current. As the countermeasure to limit the fault current in the power distribution sys...Show More
Diagnosis of Power Device Failures Using Discrete Fourier Transform for DC-AC Flying Capacitor Multilevel Converters
Ruqiang Zheng;Xin Yin;Sai Tang;Chao Zhang;Daming Wang;Jun Wang;Zishun Peng;Z. John Shen
2020 IEEE Energy Conversion Congress and Exposition (ECCE)
Year: 2020 | Conference Paper |
Cited by: Papers (1)
The fault detection of the power switching device enables the multilevel converter to enter the fault-tolerant operation mode in time, so that the converter can still operate in the case of a fault, and the reliability of the converter is improved. According to the characteristics of flying capacitor multilevel converter (FCMC), a fault diagnosis method for power switch based on voltage harmonics ...Show More
Fault Diagnosis and Tolerance for Open-circuit Faults in Multi-Level Inverters
2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia)
Year: 2022 | Conference Paper |
Cited by: Papers (6)
This paper presents a creative method for detecting and tolerating open circuit faults in a three-level hybrid active neutral point clamped (HANPC) converter. The faults have direct effects on the output voltages and currents of the three-phase system. Therefore, the early detection and tolerance would enhance the system's reliability and stability. The detection method mainly depends on calculati...Show More
A Novel Fault Current Limiting Control for Half-Bridge MMC
Binye Ni;Meng Zhou;Wenping Zuo;Jinyu Wen;Wang Xiang;Weixing Lin
2020 IEEE Power & Energy Society General Meeting (PESGM)
Year: 2020 | Conference Paper |
A novel fault current limiting control for half-bridge modular multilevel converters (MMC) is proposed in this paper. This control scheme is able to limit the fault current without implementing extra devices. It will be triggered automatically once DC faults occur and can suppress the fault current by reducing the output DC voltages of MMCs. Compared with the existing fault current limiting method...Show More
Laser-Induced Fault Simulation
2013 Euromicro Conference on Digital System Design
Year: 2013 | Conference Paper |
Cited by: Papers (9)
This paper presents a multi-level simulator for laser-induced fault simulation in digital circuits. It automatically performs the simulation of laser-induced faults using layout information and laser spot information in order to locate affected gates and derive fault-models. The paper mainly focuses on multi-level simulation for obtaining high accuracy of the fault simulation at transistor level a...Show More
tLIFTING: An open-source multi-level fault simulator for ionizing effects
Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
Year: 2013 | Conference Paper |
This paper presents a multi-level simulator tLIFTING for fault simulation in digital circuits. Multi-level simulation is used for precision of the information of the fine grain transistor level and the conciseness of the coarse grain logic level. This multi-level process allows handling natural and maliciously induced physical phenomenon leading to circuit misbehavior, while dealing with large cir...Show More
A new approach to fault diagnosis of multilevel inverter
2018 Chinese Control And Decision Conference (CCDC)
Year: 2018 | Conference Paper |
Cited by: Papers (6)
To handle the fault diagnosis of multilevel inverter, a new approach based on hybrid intelligent algorithms has been proposed in this paper. Firstly, the wavelet packet transform (WPT) is applied for the multi-scale wavelet packet decomposition of the fault signal, and the fault feature vector is extracted from the reconstructed wavelet packet energy. Then, the principal component analysis (PCA) i...Show More
A new fault tolerant SVPWM strategy for multilevel converters
IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society
Year: 2014 | Conference Paper |
Fault tolerant and survivable operation schemes for multi-level converters, that interface the grid and critical loads, have been gathering attention for enhanced reliability. In case short-circuit or open-circuit faults occur in one or multiple voltage cells, the space vector pulse width modulation (SVPWM) control algorithm has to be modified according to the available voltage vectors for surviva...Show More
Multi-level logic minimization through fault dictionary analysis
Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)
Year: 1999 | Conference Paper |
Cited by: Papers (1)
Presents the results of the study of a new algorithm for multi-level logic minimization. The study is based on the premise that an untestable node is a redundant node, and that nodes that do not demonstrably cause conflicting behavior at primary outputs may be compatible. Data gathered using the presented techniques show that fault dictionary analysis is a powerful tool for logic minimization. The...Show More
A Fault Tolerant-MLI with Modified PWM Technique for Symmetrical and Asymmetrical Voltage Levels
2022 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)
Year: 2022 | Conference Paper |
Cited by: Papers (1)
In the current scenario, fault-tolerant multilevel inverters (FTMLIs) have become necessary in driving emergency or critical loads with high-quality output voltage. This article introduces a new FTMLI, which can tolerate different types of single and multi-switch faults under symmetrical and asymmetrical voltage modes. The proposed converter has multiple redundant switching states to generate the ...Show More
Fault-ride-through Strategies for Modular Multilevel Shipboard Storage System
Fabio Mandrile;Michele Pastorelli;Salvatore Musumeci;Mariapia Martino
2024 International Conference on Smart Energy Systems and Technologies (SEST)
Year: 2024 | Conference Paper |
In waterborne applications, the up-to-date objective is emissions reduction. The current effort to achieve this target is oriented towards a complete electrification of the maritime sector. The battery energy storage system plays a crucial role in this area, the reliability and the continuity of service of these battery systems are topics of remarkable interest. This paper deals with the failures ...Show More
A New Active Fault-Tolerant SVPWM Strategy for Single-Phase Faults in Three-Phase Multilevel Converters
Multilevel converters have been well studied for high-voltage high-power renewable energy applications. Owing to the multibranch structure, these converters can be operated under fault conditions in case of a loss of a branch or voltage cell. In this regard, this paper proposes a new active fault-tolerant space vector pulsewidth modulation strategy for single-phase faults in three-phase multilevel...Show More
A New Hybrid-Modular Multi-level Inverter with Fault-Tolerant Capability
2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe)
Year: 2023 | Conference Paper |
Cited by: Papers (1)
This paper proposes a new single-phase hybrid-modular multi-level inverter (H-MMI) topology. The proposed H-MMI can ensure fault-tolerance under different faulty scenarios. The H-MMI architecture utilizes a series connection of DC sources and power switches to generate multiple voltage levels, but this arrangement also increases the system’s vulnerability to failures. To address this challenge, a ...Show More
Power Grid Fault Localtion Method Based on Graph Neural Network
2023 IEEE 3rd International Conference on Information Technology, Big Data and Artificial Intelligence (ICIBA)
Year: 2023 | Conference Paper |
With the improvement of the interconnection degree of the power grid and the massive grid-connected operation of new energy, the fault characteristics of power grid have changed. After the fault occurs, quickly locating the fault components will help improve the fault handling efficiency of the dispatchers. In this paper, a graph neural network used for fault component identification is designed. ...Show More
Naive Bayes Classifier for Cascaded H-Bridge Multi-Level Inverter Open Circuit Fault Diagnosis
A Naresh Kumar;K Lingaswamy;Malleboina Nagaraju;M. Ramesha;Elemasetty Uday Kiran;K Viswanath Allamraju
2024 International Conference on Computational Intelligence for Security, Communication and Sustainable Development (CISCSD)
Year: 2024 | Conference Paper |
This paper is explained open circuit fault detection and classification in Cascaded H-Bridge Multi-Level (CHBML) Inverter using designing Naive Bayes Classifier (NBC), thus enhancing efficacy and accuracy of the fault diagnosis. The pulse width modulation scheme is produces gate pulses in CHBML Inverter. The NBC is developed for detection and classification for open circuit fault employing the Haa...Show More
Capacitor Voltage Control of MMC-STATCOM during Unbalanced AC System Fault
Kaho Nada;Takeshi Kikuchi;Tsuguhiro Takuno;Toshiyuki Fujii;Ryosuke Uda;Takashi Sugiyama
2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)
Year: 2018 | Conference Paper |
Cited by: Papers (5)
This paper describes a capacitor voltage control method of a modular multi-level cascade (MMC) converter configuring delta connection for a STATCOM. Each converter cell has its capacitor in DC-side, therefore this circuit configuration requires controlling the capacitor voltage level individually. Especially, controlling the voltage of each phase is important because the grid voltage can be a sudd...Show More
DC fault parameter sensitivity analysis
12th IET International Conference on Developments in Power System Protection (DPSP 2014)
Year: 2014 | Conference Paper |
Cited by: Papers (7)
At present High Voltage Direct Current (HVDC) Voltage Source Converters (VSC) are susceptible dc faults leading to extreme currents. The fault current cannot be controlled by the converter switching flows in the anti-parallel diodes. Protection devices are, therefore, required to operate with sufficient speed to avoid device failure. A method is introduced to calculate the critical time for protec...Show More
Modeling and Control of Multi-phase Motor Fed by Multi-level Inverter for Electric Vehicles
Huy Luong-Gia;Bảo-Huy Nguyễn;Linh H. Tran;Minh C. Ta;Thanh Vo-Duy
2024 IEEE Vehicle Power and Propulsion Conference (VPPC)
Year: 2024 | Conference Paper |
The automotive industry is undergoing an electrification revolution with the adoption of Electric Vehicles (EVs) worldwide. EVs, powered by electric motors, traction inverters, and rechargeable batteries, offer significant benefits in energy efficiency and emissions reduction. Reliability is crucial in pow-ertrain systems. Multi-phase electric motors are gaining attention for their enhanced perfor...Show More
Multilevel inverter drivers have become widely applied in high-voltage and high-power applications. Therefore fault diagnosis of voltage source inverters is becoming more and more important. One possible fault within the inverter is IGBT open circuit fault. An overview of the different strategies to detect this fault is given, including the algorithms to localize the fault switch device. This pape...Show More
Testability measures in pseudorandom testing
The authors present two methods for computing the fault detection probabilities in combinational networks. The methods provide a deeper insight into the effects of signal correlations caused by multiple fan-out reconvergencies and can be used in testability analysis to predict the fault coverage of pseudorandom patterns. The performances of these algorithms have been tested on significant benchmar...Show More
A Fast Protection of Multi-Terminal HVDC System Based on Transient Signal Detection
Lian Liu;Zhou Liu;Marjan Popov;Peter Palensky;Mart A. M. M. van der Meijden
HVDC technologies are widely acknowledged as one of solutions for the interconnection of renewable energy resources with the main electric power grid. The application of the latest modular multi-level converter (MMC) makes power conversion much more efficient. Due to the relatively low impedance in a DC system, DC fault currents may rise to an extremely high level in a short period of time, which ...Show More
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