Showing 1-11 of 11 resultsfor "Index Terms":I/O linearizable systems
"Index Terms":I/O linearizable systems
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It is shown that the performance of a globally bounded partial state feedback control of an input-output linearizable system can be recovered by a sufficiently fast high-gain observer. The performance recovery includes recovery of asymptotic stability of the origin, the region of attraction. and trajectories.Show More
In this paper a novel method for the design of input-output linearizing feedback laws for nonlinear systems with unstable zero-dynamics is presented. The approach is based on a suitable stable/antistable factorization of the zero-dynamics and guarantees internal stability of the compensated system. In general an exact I/O-linearization of nonminimum phase systems will not be possible. If a nonline...Show More
The API interfaces provided by CUDA help programmers to get high performance CUDA applications in GPU, but they cannot support most I/O operations in device codes. The characteristics of CUDA's mapped memory are used here to create a dynamic polling service model in the host which can satisfy most I/O functions such as read/write file and “printf”. The technique to implement these I/O functions ha...Show More
IBM Power9 Processor Architecture
Satish Kumar Sadasivam;Brian W. Thompto;Ron Kalla;William J. Starke
The IBM Power9 processor has an enhanced core and chip architecture that provides superior thread performance and higher throughput. The core and chip architectures are optimized for emerging workloads to support the needs of next-generation computing. Multiple variants of silicon target the scale-out and scale-up markets. With a new core microarchitecture design, along with an innovative I/O fabr...Show More
A Highly Efficient Implementation of I/O Functions on GPU
2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum
Year: 2012 | Conference Paper |
The API interfaces provided by CUDA can help programmers develop CUDA applications and get high performance in GPU. However, many of the I/O operations are not supported in device codes. This paper has implemented most of the I/O functions through host's agent by using the characteristics of mapped memory in CUDA, such as read/write file and ¡®printf'. The methods that used to implement these I/O ...Show More
Preemptible I/O Scheduling of Garbage Collection for Solid State Drives
Junghee Lee;Youngjae Kim;Galen M. Shipman;Sarp Oral;Jongman Kim
Unlike hard disks, flash devices use out-of-place updates operations and require a garbage collection (GC) process to reclaim invalid pages to create free blocks. This GC process is a major cause of performance degradation when running concurrently with other I/O operations as internal bandwidth is consumed to reclaim these invalid pages. The invocation of the GC process is generally governed by a...Show More
Formal Definitions and Performance Comparison of Consistency Models for Parallel File Systems
The semantics of HPC storage systems are defined by the consistency models to which they abide. Storage consistency models have been less studied than their counterparts in memory systems, with the exception of the POSIX standard and its strict consistency model. The use of POSIX consistency imposes a performance penalty that becomes more significant as the scale of parallel file systems increases...Show More
Towards a Platform-Independent Cooperative Human Robot Interaction System: III An Architecture for Learning and Executing Actions and Shared Plans
Stephane Lallee;Ugo Pattacini;Séverin Lemaignan;Alexander Lenz;Chris Melhuish;Lorenzo Natale;Sergey Skachek;Katharina Hamann;Jasmin Steinwender;Emrah Akin Sisbot;Giorgio Metta;Julien Guitton;Rachid Alami;Matthieu Warnier;Tony Pipe;Felix Warneken;Peter Ford Dominey
Robots should be capable of interacting in a cooperative and adaptive manner with their human counterparts in open-ended tasks that can change in real-time. An important aspect of the robot behavior will be the ability to acquire new knowledge of the cooperative tasks by observing and interacting with humans. The current research addresses this challenge. We present results from a cooperative huma...Show More
Towards a Platform-Independent Cooperative Human Robot Interaction System: III An Architecture for Learning and Executing Actions and Shared Plans
Stephane Lallee;Ugo Pattacini;Séverin Lemaignan;Alexander Lenz;Chris Melhuish;Lorenzo Natale;Sergey Skachek;Katharina Hamann;Jasmin Steinwender;Emrah Akin Sisbot;Giorgio Metta;Julien Guitton;Rachid Alami;Matthieu Warnier;Tony Pipe;Felix Warneken;Peter Ford Dominey
Consistency and Fault Tolerance Considerations for the Next Iteration of the DOE Fast Forward Storage and IO Project
2014 43rd International Conference on Parallel Processing Workshops
Year: 2014 | Conference Paper |
Cited by: Papers (3)
The DOE Extreme-Scale Technology Acceleration Fast Forward Storage and IO Stack project is going to have significant impact on storage systems design within and beyond the HPC community. With phase 1 of the project complete, it is an excellent opportunity to evaluate many of the decisions made to feed into the phase 2 effort. With this paper we not only provide a timely summary of important aspect...Show More
RADIR: Lock-free and wait-free bandwidth allocation models for solid state drives
2014 21st International Conference on High Performance Computing (HiPC)
Year: 2014 | Conference Paper |
Cited by: Papers (1)
Novel applications such as micro-blogging and algorithmic trading typically place a very high load on the underlying storage system. They are characterized by a stream of very short requests, and thus they require a very high I/O throughput. The traditional solution for supporting such applications is to use an array of hard disks. With the advent of solid state drives (SSDs), storage vendors are ...Show More
An input/output expansion bus with a 32-or 64-bit width is described in this standard.The SBus is designed for systems requiring a small number of expansion ports.SBus Cards may be connected to a standard SBus Connector mounted on the motherboard.SBus Devices may also be attached to the SBus directly on the system's motherboard.The dimensions of the SBus Card are 83.8 mm by 146.7 mm,making the car...Show More
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