An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories

Moving to more advanced CMOS technologies can improve the performance and energy efficiency of the VLSI systems, including the static RAM (SRAM) as one of the most demanding memory elements of the modern computer systems. However, the long-term reliability of the SRAM is also important and needs to be carefully considered. This is particularly of utmost importance in safety critical systems, including automotive, with stringent requirements for in-field testing. In advanced technology nodes, the interconnects are designed in a tighter pitch-size, which result in an increase in the current density. Moreover, due to the higher chip complexity, the operating temperature is typically higher. Both the high current density and high temperature exacerbate the electromigration (EM) phenomenon in interconnects, which eventually leads to resistance increase and timing faults. This negatively influences the long-term reliability of the system. Because of the EM, SRAM-based memory modules may undergo field failure, such as read or write faults. To avoid functional safety violation, early detection and prediction of the EM is crucial. In this work, we propose an optimized EM test methodology which is able to predict the effect of EM up to 9.7 months earlier before it leads to failures in normal functional mode.