Fine-Grained Built-In Self-Repair Techniques for NAND Flash Memories

Built-in self-repair (BISR) techniques has been considered as the most cost-effective solution for enhancing yield and reliability of NAND flash memory. Owing to the inherent architecture of NAND flash memory, conventional BISR techniques use spare columns and NAND blocks as the basic replacement elements. These techniques can be categorized as the coarse-grained BISR techniques (CGBISR). It is evident that the efficiency of spare usage is very low. To cure this dilemma, fine-grained BISR (FGBISR) techniques are proposed in this paper. We first exploit the fault behaviors at the circuit level and derive novel and concise repairable fault types (RFTs) for the widely used flash memory fault models. The proposed RFTs include bit-, page-, column-, and NAND block-repairable faults. Therefore, FGBISR can conduct repairing at the fine-grained levels for improving repair efficiency. We also provide efficient redundancy analysis algorithms suitable for VLSI implementation based on the RFTs. The corresponding FGBISR architectures and repair flow are also proposed. A simulator was developed for evaluating repair rate, yield, reliability, and hardware overhead. Experimental results show that repair rate, yield, and reliability can be raised significantly with negligible hardware overhead.