A Low Noise and Low Dissipative Front-end Circuit for Wearable ECG

A high-performance instrumentation amplifier used in a wearable electrocardiogram (ECG) acquisition system is presented in this paper. A 3-amplifier topology is applied to achieve the large input impedance with 180nm CMOS technology. Remarkably, an experiment found a crucial phenomenon that helps burn more current from amplifiers to reduce the noise, resulting in a deviation between calculated gain and actual gain at the same time. Moreover, a driven-right-leg module is also implemented to set the input common-mode range, thus improving the common mode rejection ratio. The simulation under standard 180nm CMOS technology shows that the bandwidth ranges from 0.1Hz to 250 Hz. The front-end circuit operates under a 0.6V power source. In addition, for meeting different requirements, two versions of different total integrated input-referred noise and power dissipation are proposed respectively, the low-noise version with
${{3}{.47\mu VRMS}}$
and
$4.98{\mu}\mathrm{W}$
and with
$3.47\mu \text{VRMS}$
and the low-dissipation version with
$3.99\mu \text{VRMS}$
and
$3.65\mu \mathrm{W}$
. This paper's preliminary results lay an excellent theoretical foundation for the amplifier in ECG signal measurements.