Time-Shared LUT-Less Pipelined LMS Adaptive Filter

An area efficient and less computation delay least-mean-square (LMS) adaptive filter is proposed in this research work. A new time-shared design without a look-up table (LUT) is implemented for a LMS adaptive filter (ADF). The suggested method uses a single multiplier to initially calculate each filter partial product of FIR filter and then used for computing coefficient increment term utilizing a time-shared architecture for LMS ADF. Weights are incremented by using LMS algorithm. Technique is to use single multiplier during one half cycles for one purpose and again in the second half cycle for another purpose. The symmetry between the odd-multiples is then used to suggest a unique Look-up Table less (LUT-less) multiplier. Efficiency of LUT-less multiplier is compared with implementing LUT based multiplier, and both are compared in terms of area and timing. The offset terms are added using an adder tree because of the symmetries between the odd multiples. Even multiples are generated just by shifting left (multiplication) and shifting right (division) of the given number. This design is coded in verilog HDL, simulated in Modelsim and synthesized in Xilinx ISE tools. From the results it is observed that proposed design will use approximately half the area compared to conventional design with efficiently increasing the operating speed.