Effect of Wafer Back Metal Thickness and Surface Roughness towards Backend Assembly Processes

The major technology shift on the horizon to 5G, autonomous vehicle, and AI have driven semiconductor industries to strive for the continuous development of electronic devices with better functionality and higher power efficiency. Ultra wafer thinning process appears to be one of the promising solutions to produce semiconductor chip with lower resistance and hence better electrical performance. Apart from electrical performance, it is very important to understand the mechanical properties of the ultra-thinned silicon chip. Different wafer back-grinding, stress relief etching and metallization steps in wafer thinning process flow will determine the die strength, surface condition, and reliability of the semiconductor chip. When wafer becomes thinner, it becomes more susceptible towards stress induced failures such as wafer saw chipping and die crack during assembly process. Also, a correlation is found between the wafer back metal surface roughness and solder die attach performance. In this study, wafers were processed with several ultra-thinning process flow that involves different etching method and metallization. The mechanical and surface properties of the wafers were then characterized to identify the correlation between the resulted properties and thinning process flow. In order to enhance the reliability and robustness of the final semiconductor package, it is very crucial to understand the effect of wafer back metal thickness and surface roughness of ultra-thin wafer towards backend assembly processes.