A Plasma Enhanced CVD Technology for Solving Issues on Sidewall Deposition in Trenches and Holes

EUV lithography drives the miniaturization of semiconductors for higher integration, and semiconductor manufacturing is in transition from two-dimensional (2D) to three-dimensional (3D) structures [1], which plays a crucial role in supporting packaging for edge computing such as Internet-of-Things (loT). 3D power scaling enables higher integration without reducing the size of transistors by arranging them vertically instead of horizontally. One of the important processes in manufacturing 3D structured semiconductors is the formation of films on sidewalls of trenches and holes. Such films are often deposited by plasma enhanced chemical vapor deposition (PECVD) [2]. Due to the gas decomposition by plasma, PECVD method archives a high deposition rate of good quality films at low temperature, which is an advantage over other deposition methods such as atomic layer deposition (ALD) [3]. However, this does not fully meet the actual manufacturing requirements. For instance, SiO
2
dielectric films deposited by PECVD usually have low coverage and poor film quality on sidewall of trenches and holes compared to films on surface. Ion impact is one of the most important factors contributing to improving step coverage and film quality in trenches and holes. One parameter that characterized ion impact is the ion energy distribution function (IEDF) and ion angular distribution (IADF) [4], [5]. There are strong needs for low temperature deposition in trenches and holes.