Revisiting Design Rules for Floating Metal

Electrostatic discharges (ESDs) from electrically isolated conductors (commonly called “floating metal”) were discovered to be sources of anomalies on early spacecraft. Ground tests demonstrated that discharges from floating metal were more severe and hazardous than discharges from equal areas of the dielectric film. This led to requirements to ground all thermal blanket layers. Charging and discharging of wires and coaxes were later discovered to be more severe if the conductors were ungrounded, which led to requirements to ground all unused and unterminated wires. Ground tests also showed that discharges from isolated conductors on printed circuit boards (PCBs) were also a potential risk despite the much lower flux levels inside these units. Subsequent tests showed that the peak voltage and energy of ESD transients induced in nearby PCB circuits scaled with the area of floating conductors. Based on those results, NASA HDBK 4002 and 4002A recommended limiting the area to 3 cm2 (and to 0.3 cm2 if the floating metal is on a PCB). (The recently released HDBK-4002B has removed these area guidelines.) Recent tests have shown that the peak voltage and delivered energy vary dramatically with the mode of discharge of the floating metal. Blow-off discharge amplitudes were similar to those observed in previous tests. But when the discharge punched through the insulator between the floating metal and underlying conductor, peak voltages and delivered energies were orders of magnitude higher. Given that modern designs employ multilayer circuit boards, the opportunity for punchthrough discharges is higher than that existed on the thick single-layer FR4 boards the HDBK 4002 guideline is based upon.