A Guide for Accurate and Repeatable Measurement of the RTH, JC of SiC Packages

This work aims to understand the influence of various test conditions on the measurement of the junction-to-case thermal resistance (R
TH, JC
) of SiC packages, and identify a procedure that will result in accurate and repeatable measurements. In this study, the R
TH, JC
measurements of a PCB-embedded half-bridge package containing silicon carbide (SiC) MOSFETs under different test conditions are evaluated. The R
TH, JC
is determined using the transient dual interface method (TDIM), as reported in the JEDEC JESD51-14 standard. The thermal conductivity of the thermal grease was found to have an impact on repeatability of R
TH, JC
measurements. R
TH, JC
measurement sets resulting from alternative copper standoff thickness, negative gate bias, thermal grease thickness, and clamp tip style were found to have statistically significant differences in R
TH, JC
measurement mean compared to the control set. A method for reducing deviation in R
TH, JC
measurements is proposed. The R
TH, JC
of a TO-247 package containing the same SiC MOSFET die is reported to act as a commercially available reference for the PCB-embedded package.