Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing

In this paper, domain specific ReRAM-based Computation-in-Memory (CiM) design for simulated annealing (SA) is proposed. This paper reveals that the influence of bit precision and memory cell errors of ReRAM CiM on the accuracy for SA depends on the domains of combinatorial optimization problems, such as Max-Cut and Knapsack problems. It is found that Max-Cut problem has smaller circuit structure and is 3-bit higher tolerant of bit precision, but 4% lower bit-error rate (BER) tolerant, compared with Knapsack problem. In this paper, considering the requirements of bit precision and BER from each domain, examples of case studies and design strategy are presented such that ReRAM CiMs are best optimized in terms of reliability and array area of memory cells. Furthermore, the proposed best-optimized ReRAM CiM for Max-Cut problem improves the quality of SA by introducing approximate answers and avoiding local minimum.