Implementation of IMPLY-based Memristive Subtractor

Memristive technology is the fast emerging alternative to the traditional computing architectures because of its In-Memory-Computation (IMC) capability and low area footprint. Subtraction is a basic arithmetic operation in microprocessors and digital signal processing applications. An IMPLY-based one-bit subtractor is proposed with five memristors and requires nineteen computational steps. Further, this paper presents two multi-bit subtractor designs. One is a serial approach, which has less number of memristors, while the second design is a parallel approach with less number of computational steps. In particular, a 32-bit serial subtractor takes 67 memristors and parallel subtractor takes 174 steps to compute the output. A 32-bit subtractor designed in parallel approach has a better Figure-of-Merit with a 29% improvement compared to the best existing design.