Time-Dependent Degradation Mechanism of 1.2 kV SiC MOSFET Under Long-Term High-Temperature Gate Bias Stress

This work investigates the degradation mechanism of 1.2 kV silicon carbide (SiC) metal oxide semiconductor field-effect transistor (MOSFET) under positive or negative long-term high-temperature gate bias (HTGB) stress. After positive long-term HTGB stress, the device shows a positive shift in threshold voltage (
${V}_{\text {th}}{)}$
and an increase in ON-state resistance (
${R}_{ \mathrm{\scriptscriptstyle ON}}{)}$
, which mainly results from the electron traps at or near the SiC/SiO2 interface. While subjected to negative HTGB stress, the drift of
$V_{\text {th}}$
is time-dependent and correlated with the gate bias. For the device biased at a low gate voltage of −10 V, due to the hole traps at or near the interface, its
${V}_{\text {th}}$
exhibits negative shift all the time. But the drift of
${V}_{\text {th}}$
for the device biased at a higher voltage of −20 V is decreased first with the stress time, then is increased with the stress time, which may result from the hole traps and the additional electron traps introduced by the tunneling effect. Through the low-frequency noise technology, it is demonstrated that the trap density of the device biased at higher negative gate voltage of −20 V has been increased up to three times.