Tunnel Magnetoresistance Based Passive Resistance Replacement in Hybrid MTJ-CMOS Integration

Previous theoretical and experimental works revealed the novel factors that Magnetic tunnel junction (MTJ) can be integrated into novel hybrid circuits except for memory applications. This paper makes exploitation of tunnel magnetoresistacne based replacement in diminishing layout penalty of on-chip passive component during circuit design and takes sigma-delta analog-to-digital converter (SD-ADC), resistor-based temperature sensor (-55
$^{\,\circ }$
C
$\sim 125^{\,\circ }$
C) as two case study where large resistance is needed and restricts the scaling down. Considering the application in MRAM, the mainstream field of MTJ process and dealing with the problems of MRAM in wide temperature write operation, two temperature adaptive write schemes of MRAM are also proposed as the further applications of the proposed MTJ-based temperature sensor. The research of these circuits covers major characteristics of MTJ as the passive component, including area, variation and temperature characteristics. Large CMOS resistance in SD-ADC and bridge transducer in resistor-based temperature sensor are replaced by MTJ-based resistors. Simulation results reveal that the layout area of passive resistors in resistor-capacitor (RC) integrator was greatly reduced by 94.52% in comparison with fully 28nm CMOS design or 94.13% for wide temperature use when other performance is almost unchanged. In addition, the MTJ based bridge transducer in resistor-based temperature sensor can reduce the resistance layout area by over 90% with better linearity comparing with general CMOS resistor-based temperature sensor designs. Based on the MTJ-based temperature sensor, the two different adaptive write circuits help reduce write power consumption and delay of MRAM respectively for wide temperature use.