High Performance Stacked-FETs in 0.25 µm GaN Technology for S-band Power Amplifiers

In this article the feasibility and benefits of Stacked-FET structures in a state-of-art GaN technology are investigated. Trade-offs between output power, efficiency and stability are made to yield stable, high performance devices. The results of three S-band GaN stacked-FET structures in the UMS GH25-10 technology are given. These structures are designed for drain voltages levels of 60 V or higher, which is (more than) twice the nominal drain voltage for this technology. It is shown that power level above 5 W/mm with PAE levels above 60 % are achieved. The obtained results are translated to power amplifier performance estimations showing the potential of these structures.