Analysis of Parallel Prefix Adders with Low Power and Higher Speed

The addition of binary digits is regarded as one of the most essential operations in computer mathematics. To enhance the adder's efficiency, it must be both time and power efficient. Parallel prefix adders are more efficient than conventional adders. Kogge-stone, Brent-kung, Ladner, and Fischer are just a few of the adders that appear in this piece of art. Constructing an effective adder using the Brent Kung, Kogge-stone, and Ladner Fischer algorithms requires the use of parallel prefix architecture. A comparison of the power consumption, delay, and transistor count of prefix adders is done in this research.