Temperature Analysis on Short Channel Effects of Modified NCFET : A Simulation Study

In this study, temperature analysis of a hybrid architecture of NCFET with a insulator layer having high k dielectric constant assisted substrate is proposed. The channel conductivity is controlled by the applied gate voltage. The investigation is done for three temperatures 250K, 300K and 350K. In this analysis, it is observed that the off state current for the modified NCFET device architecture is reduced considerably with a decrease in temperature, which results to a better and higher switching ratio (Ion/Ioff) for the device. In addition, the drain induced barrier lowering (DIBL) reduced by 34.02% with 100K reduction of temperature. Further, the threshold voltage (Vth) changes with the temperature. Furthermore, it has been detected in simulation that the threshold voltage is decreased by 21.71% as the temperature increases from 250K to 350K. Subthreshold Swing is reduced by 39.71% with 100K reduction of temperature in the saturation region. All the factors are drawn out by using the Cogenda Visual TCAD tool.