Optimization on Bi-Directional PNP ESD Protection Device for High-Voltage FlexRay Applications

The I/O of CMOS integrated circuits of for FlexRay communication has to be tolerant with the input signals of ±60 V in its normal applications. Thus, the on-chip electrostatic discharge (ESD) protection devices for such I/O pin must be kept off unless the bus voltage is higher than 60 V or lower than −60 V. In this work, the bi-directional p-n-p (Bi-PNP) device was proposed and optimized for bi-directional ESD protection in the FlexRay communication systems. The proposed Bi-PNP devices were verified in a 0.15-
$\mu \text{m}$
BCD technology. The relationships between the layout spacing of doping layers and other device characteristics, including trigger voltage (Vt1) and breakdown voltage (BV), were investigated, respectively. The size dependence on the ESD robustness was also studied. The transient response of the proposed Bi-PNP device under fast ESD stress was investigated by very fast TLP (vf-TLP) and TLP measurement. In addition, the empirical correlations of the It2 on the HBM and IEC 61000-4-2 failure levels were estimated. Finally, the recommended size and parameters of the proposed Bi-PNP device for ±60 V FlexRay application are provided.