A Study of Ldmos With High Breakdown Voltage and Low On-Resistance in 22Nm Technology

The characteristics of LDMOS (Laterally Diffused Metal Oxide Semiconductor) with various layout structures have been studied based on 22nm HKMG technology in this paper. A lightly drift region Psub is designed for high BVDS performance, which induces the impact ionization drive further away from the STI edge and Si/SiO
2
interface. To improve the trade-off parameter Rdson, systematical TCAD simulations and experiments have shown optimization layout structure for small Ron with optimized Lw (Psub region), Lg (effective channel), and Lp (a NW region and gate overlap). The optimized layout devices showed BV>13.4V&Rdson of 2.21 mohm.mm
²
for NLDMOS and BV>14.1V &Rdson of 6.51 mohm.mm
²
for PLDMOS.