Analytical Optimization Method for VLSI Global Placement

Placement is one of the critical stages in the physical design of very large scale integrated circuits (VLSI), which has a significant impact on the performance of subsequent stages. Modern placement algorithms need to handle large-scale designs with millions of cells and complex placement constraints. Further, placement often includes three steps: global placement, legalization, and detailed placement. To a great extent, global placement affects the quality of the final placement and thus is considered a crucial part of the placement. Based on the recent research progress, this paper briefly introduces related optimization models and algorithms commonly used in VLSI global placement and discusses possible research directions.