SOBLPM: Stochastic Optimization Based Link Power Management for 3D-Stacked Memories

Modern-day applications are becoming more and more data-intensive, directly aggravating the memory wall problem. 3D stacked memory such as the Hybrid Memory Cube (HMC), and High Bandwidth Memory (HBM) have evolved to be of the most promising solution. Much effort has been taken in the recent times in developing off-chip link technologies such as Silicon Interposers (for the case of HBM) or Serializer-Deserializer (for the case of HMC) to minimize the memory access latency. Despite all the efforts in performance improvements of 3D stacked memory, high power consumption remains an issue of concern. It has been established that significant power is consumed in maintaining these off-chip links. However, not much attention has been paid to the optimizations of the power consumed by the off-chip links. The paper proposes a stochastic optimization based link power management (SOBLPM). In this paper, we model the link priority strategies using the 2D Markov model and queuing theory and use the model for stochastic optimization strategy. The proposed strategy selects the number of links to be maintained based on the rejection probability of memory requests. The prediction accuracy of our model for the memory access latency is around 2% of the simulation data. The proposed stochastic optimization strategy provides around 20 % more power efficiency against the existing off-chip link power management schemes without sacrificing the latency performance.