Mathematical Modelling of an Application Specific Processor Architecture with Power Optimization

Analytical and mathematical modelling has gained an increased interest as the power concerns are continually increasing in the computing systems. optimizing power and performance for application specific processors can substantially increase the energy-efficiency. However, designing an application specific processor architecture requires an exploration of micro-architectural parameters. Mathematical models are suitable for providing insights into the specific application and its impacts on the micro-architecture. Unfortunately, current architectural models lack some microarchitectural inputs. The paper presents a mathematical model and associates the micro-architectural needs to estimate the power and performance for an application specific architecture. This paper deals with the instruction scheduling in a processor architecture with latency to optimize the power and performance. The proposed model includes the latency depending on the tasks/applications and functional units.