A New Low Noise 4-Gb/s Serial CMOS MPPM Modulator

This article presents a novel scheme for modulating 4-bits of data by multi-pulse position modulation (MPPM) which is an advantageous circuit and method to be used in optical transmitters. Gaussian distribution noise was also applied to width of CMOSs through simulations for the most coincidence to reality which has shown suitable response. By activating limited number of CMOSs for modulating each timeslot, the power consumption is particularly low. Meanwhile, the differential voltage-mode output reduces power supply noise and dissipation. CMOS $0.18- \mu \mathrm{m}$ technology library and 1.8-v supply were used for this modulator. By dividing each symbol in 5 timeslots and modulating 4 bits in each symbol the data modulating rate equals to 4Gb/s. The openness of eye diagram is highly distinguishable and the jitter was measured 55-ps. The power consumption through simulation duration was only 4.9609-m Watt.