A Pairwise Swap Enabled Randomized DEM Addressing Intersegment Mismatch for Current Steering Digital-to-Analog Converters

Mismatch-based nonlinear distortion greatly influences the accuracy and spurious-free dynamic range (SFDR) of current steering digital-to-analog converters (CS-DACs). Dynamic element matching (DEM) is an intelligent technique that reduces both amplitude and timing mismatch errors. In conventional DEM DACs, further enhancement of SFDR at higher frequencies is constrained due to the presence of intersegment mismatch errors in separate segmented structures. In this article, a pairwise swap enabled randomized DEM (PSER-DEM) technique is proposed to address the intersegment mismatch effect in segmented CS-DAC. This technique uses both randomization and swapping between row and column elements of current source cells for selecting the unit current source elements. A 6-bit CS-DAC with the PSER-DEM technique has been implemented with the UMC 180-nm 1.8-V CMOS process. The proposed DAC architectures with circuit description and measurement results are demonstrated briefly. A 48.15-dB SFDR with more than 6-dB enhancement is achieved from the measurement result. The proposed architecture for 10-bit CS-DAC is presented with vigorous mismatch-based Monte Carlo simulation results, which shows more than 70-dB SFDR for the entire Nyquist range frequency with more than 7-dB improvement from the conventional DEM DACs. Along with the PSER-DEM technique, a signal-dependent randomization concept is proposed to reduce the element transition rate and switching activity of current cells, which reduced the power consumption up to 4 mW for oversampling DACs. A comparative assessment is presented with state-of-the-art literature on DEM DAC structures. The proposed method has exhibited superior performance, which signifies the suitability for high-speed and high-resolution CS-DACs.